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R UCF Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Clock Period Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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R UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Chapter 9: Digital to Analog Converter (DAC) SPI Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Interface Signals . . . . . . . . . . . . . . . .
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R Creating an SPI Serial Flash PROM File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 Downloading the Design to SPI Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 Downloading the SPI Flash using XSPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 Additional Design Details. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Shared SPI Bus wit
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R Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 Chapter 17: DS2432 1-Wire SHA-1 EEPROM UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 Appendix A: Schematics FX2 Expansion Header, 6-pin Hea
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R 6MicroBlaze Development Kit Spartan-3E 1600 Edition User Guide www.xilinx.com UG257 (v1.1) December 5, 2007
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R Preface About This Guide This user guide provides basic information on the MicroBlaze Development Kit board capabilities, functions, and design. It includes general information on how to use the various peripheral functions included on the board. For detailed reference designs, including VHDL or Verilog source code, please visit the following web link. Spartan™-3E Starter Kit Board Reference Page http://www.xilinx.com/sp3e1600e Acknowledgements Xilinx wishes to thank the following companie
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R Preface: About This Guide Chapter 5, “Character LCD Screen,” describes the functionality of the character LCD screen. Chapter 6, “VGA Display Port,” describes the functionality of the VGA port. Chapter 7, “RS-232 Serial Ports,” describes the functionality of the RS-232 serial ports. Chapter 8, “PS/2 Mouse/Keyboard Port,” describes the functionality of the PS/2 mouse and keyboard port. Chapter 9, “Digital to Analog Converter (DAC),” describes the functionality of the DAC. Chapter 10, “
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R Chapter 1 Introduction and Overview Thank you for purchasing the Xilinx MicroBlaze™ Development Kit Spartan™-3E 1600E Edition. You will find it useful in developing your Spartan-3E FPGA application. Choose the Starter Kit Board for Your Needs Depending on specific requirements, choose the Xilinx development board that best suits your needs. Spartan-3E FPGA Features and Embedded Processing Functions The MicroBlaze Development Kit board highlights the unique features of the Spartan-3E FPGA fa
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R Chapter 1: Introduction and Overview http://www.xilinx.com/xlnx/xebiz/designResources/ip_product_details.jsp?key=DO- ML403-EDK-ISE Also consider the capable boards offered by Xilinx partners: http://www.xilinx.com/products/devboards/index.htm Key Components and Features The key features of the MicroBlaze Development Kit board are: Xilinx XC3S1600E Spartan-3E FPGA Up to 250 user-I/O pins 320-pin FBGA package Over 33,000 logic cells Two Xilinx 4 Mbit Platform Flash configuration PROM Xi
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R Design Trade-Offs 8-pin DIP socket for auxiliary clock oscillator Design Trade-Offs A few system-level design trade-offs were required in order to provide the MicroBlaze Development Kit board with the most functionality. Configuration Methods Galore! A typical FPGA application uses a single non-volatile memory to store configuration images. To demonstrate new Spartan-3E capabilities, the MicroBlaze Development Kit board has three different configuration memory sources that all need to func
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R Chapter 1: Introduction and Overview 12 MicroBlaze Development Kit Spartan-3E 1600 Edition User Guide www.xilinx.com UG257 (v1.1) December 5, 2007
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R Chapter 2 Switches, Buttons, and Knob Slide Switches Locations and Labels The MicroBlaze Development Kit board has four slide switches, as shown in Figure 2-1. The slide switches are located in the lower right corner of the board and are labeled SW3 through SW0. Switch SW3 is the left-most switch, and SW0 is the right-most switch. Spartan-3E Development Board HIGH LOW UG257_02_01_061306 Figure 2-1: Four Slide Switches Operation When in the UP or ON position, a switch connects the FPGA pin t
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R Chapter 2: Switches, Buttons, and Knob NET "SW<0>" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ; NET "SW<1>" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP ; NET "SW<2>" LOC = "H18" | IOSTANDARD = LVTTL | PULLUP ; NET "SW<3>" LOC = "N17" | IOSTANDARD = LVTTL | PULLUP ; UG257_02_060206 Figure 2-2: UCF Constraints for Slide Switches Push-Button Switches Locations and Labels The MicroBlaze Development Kit board has four momentary-contact push-button switches, shown in Figure 2-3. The push buttons are l
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R Rotary Push-Button Switch FPGA I/O Pin Push Button 3.3V BTN_* Signal UG227_02_04_060206 Figure 2-4: Push-Button Switches Require an Internal Pull-Down Resistor in FPGA Input Pin In some applications, the BTN_SOUTH push-button switch is also a soft reset that selectively resets functions within the FPGA. UCF Location Constraints Figure 2-5 provides the UCF constraints for the four push-button switches, including the I/O pin assignment and the I/O standard used, and defines a pull-down resist
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R Chapter 2: Switches, Buttons, and Knob Rotary / Push Button FPGA I/O Pin 3.3V ROT_CENTER Signal UG257_02_06_060906 Figure 2-6: Push-Button Switches Require Internal Pull-up Resistor in FPGA Input Pin Rotary Shaft Encoder In principal, the rotary shaft encoder behaves much like a cam, connected to central shaft. Rotating the shaft then operates two push-button switches, as shown in Figure 2-7. Depending on which way the shaft is rotated, one of the switches opens before the other. Likewise,
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R Discrete LEDs Rising edge on ‘A’ Switch opening chatter on ‘A’ when ‘B’ is Low indicates injects false “clicks” to the RIGHT RIGHT (clockwise) rotation Rotating RIGHT A B Switch closing chatter on ‘B’ injects false “clicks” to the LEFT (’B’ rising edge when ‘A’ is Low) UG257_02_08_060206 Figure 2-8: Outputs from Rotary Shaft Encoder May Include Mechanical Chatter UCF Location Constraints Figure 2-9 provides the UCF constraints for the four push-button switches, including the I/O pin assignm
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R Chapter 2: Switches, Buttons, and Knob Spartan-3E Development Board UG257_02_10_061306 Figure 2-10: Eight Discrete LEDs Operation Each LED has one side connected to ground and the other side connected to a pin on the Spartan-3E device via a 390 current limiting resistor. To light an individual LED, drive the associated FPGA control signal High. UCF Location Constraints Figure 2-11 provides the UCF constraints for the four push-button switches, including the I/O pin assignment, the I/O sta
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MicroBlaze Development
Kit Spartan-3E 1600E
Edition User Guide
UG257 (v1.1) December 5, 2007
R
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R Xilinx is disclosing this Document and Intellectual Property (hereinafter “the Design”) to you for use in the development of designs to operate on, or interface with Xilinx FPGAs. Except as stated herein, none of the Design may be copied, reproduced, distributed, republished, downloaded, displayed, posted, or transmitted in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Any u
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Table of Contents Preface: About This Guide Acknowledgements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Additional Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Chapter 1: Introduction and Overview Choose
