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DS87C530/DS83C530
EPROM/ROM Microcontrollers with
Real-Time Clock
www.maxim-ic.com
FEATURES PIN CONFIGURATIONS
80C52 Compatible
TOP VIEW
8051 Instruction-Set Compatible
Four 8-Bit I/O Ports 7 1 47
Three 16-Bit Timer/Counters
8 46
256 Bytes Scratchpad RAM
Large On-Chip Memory
16kB EPROM (OTP)
1kB Extra On-Chip SRAM for MOVX
ROMSIZE Features
Selects Effective On-Chip ROM Size from
DALLAS
0 to 16kB
DS87C530
Allows Access to Entire
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock ORDERING INFORMATION MAX CLOCK PART TEMP RANGE SPEED PIN-PACKAGE (MHz) DS87C530-QCL 33 52 PLCC 0 °C to +70 °C DS87C530-QCL+ 33 52 PLCC 0 °C to +70 °C DS87C530-QNL 33 52 PLCC -40 °C to +85 °C DS87C530-QNL+ 33 52 PLCC -40 °C to +85 °C DS87C530-KCL* 33 52 Windowed CLCC 0 °C to +70 °C DS87C530-ECL 33 52 TQFP 0 °C to +70 °C DS87C530-ECL+ 33 52 TQFP 0 °C to +70 °C DS87C530-ENL 33 52 TQFP -40 °C to +85 °C DS87C530-
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DETAILED DESCRIPTION The DS87C530/DS83C530 EPROM/ROM microcontrollers with a real-time clock (RTC) are 8051- compatible microcontrollers based on the Dallas Semiconductor high-speed core. They use 4 clocks per instruction cycle instead of the 12 used by the standard 8051. They also provide a unique mix of peripherals not widely available on other processors. They include an on-chip RTC and battery backup support for an on-c
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Figure 1. Block Diagram DS87C530/ DS83C530 PIN DESCRIPTION PIN NAME FUNCTION PLCC TQFP 52 45 V +5V Processor Power Supply CC 1, 25 18, 46 GND Processor Digital Circuit Ground 29 22 V +5V RTC Supply. V is isolated from V to isolate the RTC from digital noise. CC2 CC2 CC 26 19 GND2 RTC Circuit Ground Reset Input. This pin contains a Schmitt voltage input to recognize external active high reset inputs. The pin a
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock PIN DESCRIPTION (continued) PIN NAME FUNCTION PLCC TQFP Program Store-Enable Output. This active-low signal is a chip enable for optional 38 31 PSEN external ROM memory. PSEN provides an active-low pulse and is driven high when external ROM is not being accessed. Address Latch-Enable Output. This pin latches the external address LSB from the multiplexed address/data bus on Port 0. This signal is commonly connected to th
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock PIN DESCRIPTION (continued) PIN NAME FUNCTION PLCC TQFP 30 23 P2.0 (AD8) Port 2 (A8A15), I/O. Port 2 is a bidirectional I/O port. The reset condition of Port 2 is logic high. In this state, a weak pullup holds the port high. This condition 31 24 P2.1 (AD9) also serves as an input mode, since any external circuit that writes to the port will 32 25 P2.2 (AD10) overcome the weak pullup. When software writes a 0 to any p
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock COMPATIBILITY The DS87C530/DS83C530 are fully static, CMOS 8051-compatible microcontrollers designed for high performance. While remaining familiar to 8051 users, the devices have many new features. In general, software written for existing 8051-based systems works without modification on the DS87C530/DS83C530. The exception is critical timing since the high-speed microcontrollers perform its instructions much faster than
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock The relative time of two instructions might be different in the new architecture than it was previously. For example, in the original architecture, the MOVX A, @DPTR instruction and the MOV direct, direct instruction used two machine cycles or 24 oscillator cycles. Therefore, they required the same amount of time. In the DS87C530/DS83C530, the MOVX instruction takes as little as two machine cycles or eight oscillator cy
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Table 1. Special Function Register Locations * Functions not present in the 80C52 are in bold. REGISTER BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 ADDRESS P0 P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 80h SP 81h DPL 82h DPH 83h DPL1 84h DPH1 85h DPS 0 0 0 0 0 0 0 SEL 86h SMOD_0 PCON SMOD0 GF1 GF0 STOP IDLE 87h TCON TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 88h TMOD GATE M1 M0 GA
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Table 1. Special Function Register Locations (continued) * Functions not present in the 80C52 are in bold. REGISTER BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 ADDRESS TL2 CCh TH2 CDh PSW CY AC F0 RS1 RS0 OV FL P D0h SMOD_1 WDCON POR EPFI PFI WDIF WTRF EWT RWT D8h ACC E0h EIE ERTCI EWDI EX5 EX4 EX3 EX2 E8h B F0h RTASS F2h RTAS 0 0 F3h RTAM 0 0 F4h RTAH 0
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock automatically to occur once per second, once per minute, once per hour, or once per day. Enabling interrupts with no match will generate an interrupt 256 times per second. Software enables the timekeeper oscillator using the RTC enable bit in the RTC Control register (F9h). This starts the clock. It can disable the oscillator to preserve the life of the backup energy-source if unneeded. Values in the RTC Control register
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock 12.5pF crystal uses more power, giving a shorter battery backed life, but produces a more robust oscillator. Bit 6 in the RTC Trim register (TRIM; 96h) must be programmed to specify the crystal type for the oscillator. When TRIM.6 = 1, the circuit expects a 12.5pF crystal. When TRIM.6 = 0, it expects a 6pF crystal. This bit will be nonvolatile so these choices will remain while the backup source is present. A guard ring (co
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock space SRAM is read/write accessible and is memory mapped. This on-chip SRAM is reached by the MOVX instruction. It is not used for executable memory. The scratchpad area is 256 bytes of register mapped RAM and is identical to the RAM found on the 80C52. There is no conflict or overlap among the 256 bytes and the 1kB as they use different addressing modes and separate instructions. OPERATIONAL CONSIDERATION The erasure wi
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock device will immediately jump to external program execution because program code from 4kB to 16kB (1000h3FFFh) is no longer located on-chip. This could result in code misalignment and execution of an invalid instruction. The recommended method is to modify the ROMSIZE register from a location in memory that will be internal (or external) both before and after the operation. In the above example, the instruction which modifi
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock The on-chip data area is software selectable using 2 bits in the Power Management Register at location C4h. This selection is dynamically programmable. Thus access to the on-chip area becomes transparent to reach off-chip devices at the same addresses. The control bits are DME1 (PMR.1) and DME0 (PMR.0). They have the following operation: Table 2. Data Memory Access Control DME1 DME0 DATA MEMORY ADDRESS MEMORY FUNCTION
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Using a Stretch value between 1 and 7 causes the microcontroller to stretch the read/write strobe and all related timing. Also, setup and hold times are increased by 1 clock when using any Stretch greater than 0. This results in a wider read/write strobe and relaxed interface timing, allowing more time for memory/peripherals to respond. The timing of the variable speed MOVX is in the Electrical Specifications section. Table
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock POWER MANAGEMENT Along with the standard Idle and power-down (Stop) modes of the standard 80C52, the DS87C530/DS83C530 provide a new Power Management Mode. This mode allows the processor to continue functioning, yet to save power compared with full operation. The DS87C530/DS83C530 also feature several enhancements to Stop mode that make it more useful. POWER MANAGEMENT MODE (PMM) Power Management Mode offers a complete
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock CRYSTAL-LESS PMM A major component of power consumption in PMM is the crystal amplifier circuit. The DS87C530/DS83C530 allow the user to switch CPU operation to an internal ring oscillator and turn off the crystal amplifier. The CPU would then have a clock source of approximately 2MHz to 4MHz, divided by either 4, 64, or 1024. The ring is not accurate, so software cannot perform precision timing. However, this mode allows
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Switchback To return to a 4-clock rate from PMM, software can simply select the CD1 and CD0 clock control bits to the 4 clocks per cycle state. However, the DS87C530/DS83C530 provide several hardware alternatives for automatic Switchback. If Switchback is enabled, then the device will automatically return to a 4-clock per cycle speed when an interrupt occurs from an enabled, valid external interrupt source. A Switchback wi
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock Crystal/Ring Operation The DS87C530/DS83C530 allow software to choose the clock source as an independent selection from the instruction cycle rate. The user can select crystal-based or ring oscillator-based operation under software control. Power-on reset default is the crystal (or external clock) source. The ring may save power depending on the actual crystal speed. To save still more power, software can then disable the
