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RM0403-3-E01
Application Manual
Real Time Clock Module
RX-8564LC
Model Product Number
RX-8564LC Q418564C0xxxx00
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NOTICE • The material is subject to change without notice. • Any part of this material may not be reproduced or duplicated in any form or any means without the written permission of EPSON TOYOCOM. • The information, applied circuit, program, usage etc., written in this material is just for reference. EPSON TOYOCOM does not assume any liability for the occurrence
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RX − 8564 LC CONTENTS 1. Overview...................................................................................................................1 2. Block diagram.........................................................................................................1 3. Terminal description.............................................................................................2 3.1. Terminal connections ....................................................................
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RX − 8564 LC Low power consumption / Small size thin model package 2 I C-Bus Interface Real Time Clock Module RX − − 8564 LC − − • Built in frequency adjusted 32.768 kHz crystal unit. 2 • Interface type : 400 kHz two-wire I C-bus interface • Wide operating voltage range : 1.8 V to 5.5 V • Wide timekeeper voltage range : 1.0 V to 5.5 V ( at Ta = +25 °C ) ( Typ. ) • Low backup current : 275 nA / 3 V : C-MOS output with output control • 32.768-kHz clock freq
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RX − 8564 LC 3. Terminal description 3.1. Terminal connections RX − 8564 LC 1. N.C. 12. N.C. N.C. 2. 11. CLKOE # 1 # 12 N.C. 3. 10. VDD N.C. 4. 9. CLKOUT # 6 # 7 5./INT 8.SCL 6. GND 7. SDA VSOJ − 12pin 3.2. Pin Functions Signal I/O Function name 2 SCL Input This is the serial clock input pin for I C Bus communications. This pin's signal is used for input and output of address, data, and ACK bits, 2 synchronized with the serial clock
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RX − 8564 LC 4. External Dimensions / Marking Layout 4.1. External Dimensions RX − 8564 LC ( VSOJ − 12pin ) • External dimensions • Recommended soldering pattern ± 0.2 3.6 2.5 # 12 # 7 0.5 0.27 # 1 # 6 0.08 M 2.77 0.5 0.22 Unit : mm 0.08 4.2. Marking Layout RX − 8564 LC ( VSOJ − 12pin ) Type Logo E 8564 A123B #1 Pin Mark Production lot ∗ Contents displayed indicate the general markings and di
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RX − 8564 LC 5. Absolute Maximum Ratings GND = 0 V Parameter Symbol Condition Rating Unit Supply Voltage VDD Between VDD and GND −0.5 to +6.5 V Supply Voltage IDD VDD pin −50 to 50 mA Input Voltage VI Input pin GND−0.5 to VDD+0.5 V Output Voltage VO /INT pin GND−0.5 to VDD+0.5 V DC Input Current II −10 to 10 mA DC Output Current IO to 10 mA −10 Storage Stored bare product after TSTG to +125 −55 °C Temperature Range unpacking 6. Recommended operating conditions GND =
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RX − 8564 LC 8. Electrical Characteristics * Unless otherwise specified, GND = 0 V , VDD = 1.8 V to 5.5 V 8.1. DC characteristics , Ta = −40 °C to +85 °C Item Symbol Condition Min. Typ. Max. Unit 800 fSCL = 400 kHz µ A Current consumption IDD ∗ interface active 200 fSCL = 100 kHz µ A Current consumption 330 800 nA fSCL = 0 Hz, VDD = 5.0 V ∗ interface inactive IDD 275 700 nA fSCL = 0 Hz, VDD = 3.0 V ( fSCL = 0 Hz ) ∗ CLKOUT = disabled
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RX − 8564 LC * Unless otherwise specified, GND = 0 V , VDD = 1.8 V to 5.5 V 8.2. AC electrical characteristics , Ta = −40 °C to +85 °C Item Symbol Condition Min. Typ. Max. Unit SCL clock frequency fSCL 400 kHz Start condition set-up time tSU; STA 0.6 µ s Start condition hold time tHD; STA 0.6 µ s Data set-up time tSU; DAT 100 ns Data hold time tHD; DAT 0 ns Stop condition set-up time tSU; STO 0.6 µ s Bus free time between a STOP tBUF 1.3 µ s and START co
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RX − 8564 LC 9. Reference data [ Finding the frequency stability ] (1) Example of frequency and temperature characteristics θT = +25 °C Typ. 1. Frequency and temperature characteristics can be -6 -6 × 10 α = -0.035 × 10 Typ. approximated using the following equations. 0 2 ∆ fT = α ( θT − θX ) ! ∆ fT : Frequency deviation in any temperature ∆ 2 ! α [ 1 / °C ] : Coefficient of secondary temperature -50 −6 2 ( −0.035 ± 0.005 ) × 10 / °C ! θT [ °C ] : Ult
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RX − 8564 LC 10. External connection example VDD SCL 2 I C-BUS Master SDA VDD SCL 8564 SLAVE ADRS = 1010001 SDA GND Pull up Registor t r R = C BUS VDD SCL 2 device I C-BUS SDA GND ETM12E-01 Page − 8
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RX − 8564 LC 11. Application notes 1) Notes on handling This module uses a C-MOS IC to realize low power consumption. Carefully note the following cautions when handling. (1) Static electricity While this module has built-in circuitry designed to protect it against electrostatic discharge, the chip could still be damaged by a large discharge of static electricity. Containers used for packing and transport should be constructed of conductive materials. In addition, only solderi
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RX − 8564 LC 12. Overview of Functions and Description of Registers 12.1. Overview of Functions 1) Clock functions This function is used to set and read out month, day, hour, date, minute, second, and year (last two digits) data. Any (two-digit) year that is a multiple of 4 is treated as a leap year and calculated automatically as such until the year 2099. ∗ For details, see "13.1. Description of Registers". 2) Fixed-cycle interrupt generation function The fi
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RX − 8564 LC 12.2. Register table Address [h] Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 note ∗3 , ∗4 00 Control 1 TEST 0 STOP 0 TEST 0 0 0 ∗4 , ∗5 01 Control 2 0 × 0 TI / TP AF TF AIE TIE 02 Seconds VL 40 20 10 8 4 2 1 ∗1 03 Minutes × 40 20 10 8 4 2 1 ∗5 04 Hours 20 10 8 4 2 1 × × ∗5 05 Days 20 10 8 4 2 1 × × ∗5 06 Weekdays 4 2 1 ∗5 × × × × × 07 Months / Century C 10 8 4 2 1 ∗5 × × 08 Years 80 40 20 10 8 4 2 1 09 Minute Alarm AE 40 20 10 8 4 2 1 0A Hour
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RX − 8564 LC 13. Description of Functions 13.1. Description of registers 13.1.1. Control register 1 ( Reg − 00 [h] ) Address [h] Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 00 Control 1 TEST 0 STOP 0 TEST 0 0 0 • This register is used to control stopping and starting of the clock function, calendar function, and other functions. 1) TEST bits (bit 7 and bit 3) These two TEST bits are for use by Seiko Epson Corporation. When initializin
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RX − 8564 LC 13.1.2. Control register 2 ( Reg − 01 [h] ) Address [h] Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 01 Control 2 0 × 0 TI / TP AF TF AIE TIE • This register is used to monitor various interrupt event settings and the conditions under which various interrupt- related events occur. 1) TI / TP bit ( Interrupt Signal Output Mode Select. Interrupt / Periodic ) When a fixed-cycle timer interrupt event occurs (when the TF bit goes from "0" to 1") , this bit
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RX − 8564 LC 13.1.3. Clock counter ( Reg − 02 [h] to 04 [h] ) Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Address [h] 02 Seconds VL 40 20 10 8 4 2 1 03 Minutes 40 20 10 8 4 2 1 × 04 Hours × × 20 10 8 4 2 1 • The clock counter counts seconds, minutes, and hours. • The data format is BCD format. For example, when the "seconds" register value is "0101 1001" it indicates 59 seconds. ∗ When overwriting time data, we recommend setting "1" to the STOP bit to stop th
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RX − 8564 LC 13.1.4. Calendar counter ( Reg − 05 [h] , 07 [h] , 08 [h] ) Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Address [h] 05 Days × × 20 10 8 4 2 1 07 Months / Century C 10 8 4 2 1 × × 08 Years 80 40 20 10 8 4 2 1 • The auto calendar function updates all dates, months, and years from January 1, 2001 to December 31, 2099. • The data format is BCD format. For example, a date register value of "0011 0001" indicates the 31st. ∗ Note with caution that writi
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RX − 8564 LC 13.1.6. Alarm registers ( Reg − 09 [h] to 0C [h] ) Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Address [h] 09 Minute Alarm AE 40 20 10 8 4 2 1 0A Hour Alarm AE × 20 10 8 4 2 1 0B Day Alarm AE × 20 10 8 4 2 1 0C Weekday Alarm AE × × × × 4 2 1 • The AIE bit and AF bit can both be set or used when using alarm interrupt function to set interrupt events for dates, days, hours, minutes, etc. • When the current time matches the settings in the above alarm
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RX − 8564 LC 13.1.9. CLKOUT output register (Reg - 0D [h]) Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Address [h] 0D CLKOUT frequency FE × × × × × FD1 FD0 • This register is used to control clock output via the CLKOUT output pin. • This register is valid only when the CLKOE input pin is at high level, at which time clock output is enabled or disabled (stopped) depending on the settings in this register. ∗ When the CLKOE input pin is at low level, CLKOUT is at lo
