Resumo do conteúdo contido na página número 1
Target Spec
R61509V
260k-color, 240RGB x 432-dot graphics liquid crystal
controller driver for Amorphous-Silicon TFT Panel
REJxxxxxxx-xxxx
Rev.0.11
April 25, 2008
Description ......................................................................................................... 6
Features .........................................................................................................7
Power Supply Specifications .....................................................
Resumo do conteúdo contido na página número 2
R61509V Target Spec Outline ..........................................................................................................................................................................40 Instruction Data Format..............................................................................................................................................40 Index (IR) ............................................................................................................
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R61509V Target Spec NVM Control................................................................................................................................................................90 NVM Access Control 1 (R6F0h), NVM Access Control 2 (R6F1h), NVM Access Control 3 (R6F2h).................90 Instruction List.................................................................................................... 92 Reset Function ..................................................
Resumo do conteúdo contido na página número 4
R61509V Target Spec Partial Display Function ..................................................................................... 139 Liquid Crystal Panel Interface Timing ............................................................... 140 Internal Clock Operation.............................................................................................................................................140 RGB Interface Operation......................................................
Resumo do conteúdo contido na página número 5
R61509V Target Spec Clock Characteristics .............................................................................................................................................172 80-system 18-/16-/9-/8-bit Bus interface Timing Characteristics .........................................................................172 Clock Synchronous Serial Interface Timing Characteristics.................................................................................173 RGB Interface Tim
Resumo do conteúdo contido na página número 6
R61509V Target Spec Description The R61509V is a single-chip liquid crystal controller driver LSI for a-Si TFT panel, incorporating RAM for a maximum 240 RGB x 432 dot graphics display, gate driver, source driver and power supply circuits. For efficient data transfer, the R61509V supports high-speed interface via 8-/9-/16-/18-bit ports as system interface to the microcomputer. As moving picture interface, the R61509V also supports RGB interface (VSYNCX, HSYNCX, DOTCLK, ENABLE and
Resumo do conteúdo contido na página número 7
R61509V Target Spec Features • A single-chip controller driver incorporating a gate circuit and a power supply circuit for a maximum 240RGB x 432dots graphics display on amorphous TFT panel in 262k colors • System interface – High-speed interfaces via 8-, 9-, 16-, 18-bit parallel ports – Clock synchronous serial interface • Moving picture display interface – 16-/18-bit RGB interface (VSYNCX, HSYNCX, DOTCLK, ENABLE, DB17-0) – VSYNC interface (System interface + VSYNCX) – FMAR
Resumo do conteúdo contido na página número 8
R61509V Target Spec Power Supply Specifications Table 1 No. Item R61509V 1 TFT data lines 720 output 2 TFT gate lines 432 output 3 TFT display storage capacitance Cst only (Common VCOM formula) 4 Liquid crystal S1~S720 V0 ~ V63 grayscales drive output G1~G432 VGH-VGL VCOM Change VCOMH-VCOML amplitude with electronic volume Change VCOMH with either electronic volume or from VCOMR 5 Input voltage IOVCC 1.65V ~ 3.3V (interface voltage) Power supply to IM0_ID, IM1-2, RESETX,
Resumo do conteúdo contido na página número 9
Difference Between R61509 and R61509V 2008.04.18 Index Command Code Function R61509 R61509V (Pin) System Interface IM2-0=011, TRI=1, DFM=0 8bit 3 transfer (2bit-8bit-8bit) Supported Deleted R000h Device Code Read 1509H B509H R002h LCD Drive Waveform Control NW[1-0] --> NW bit is deleted. 1, 2, 3 or 4 line inversion 1 line inversion R003h Entry Mode HWM High Speed RAM Write Supported Deleted Sets data format when writing 16bit EPF[1-0] data in 18bit format. Supported Deleted R006h Outline Sharpen
Resumo do conteúdo contido na página número 10
R61509V Target Spec Block Diagram GND Index Control AGND Register (IR) Register Address (CR) Counter IOVCC System IM2-1, IM0_ID interface 18 Write data 18 CSX 18 18 bit Graphic RAM RS latch WR_SCL 16 bit (GRAM) RDX 9 bit 233,280byte 18 SDI 18 8 bit Read data SDO Serial latch DB17-0 18 VSYNCX External HSYNCX display DOTCLK ENABLE interface RESETX FMARK V63-0 PROTECT VGS Timing generator VMON G1-G432 Oscillator Internal reference
Resumo do conteúdo contido na página número 11
R61509V Target Spec Block Function 1. System Interface The R61509V supports 80-system high-speed interface via 8-, 9-, 16-, 18-bit parallel ports and a clock synchronous serial interface. The interface is selected by setting the IM2-0 pins. The R61509V has 16-bit index register (IR), 18-bit write-data register (WDR), and 18-bit read-data register (RDR). The IR is the register to store index information from control register and internal GRAM. The WDR is the register to tempo
Resumo do conteúdo contido na página número 12
R61509V Target Spec Table 4 Instruction write IM2 IM1 IM0 System interface DB pins RAM write data transfer 80-system 18-bit Single transfer 0 0 0 DB17-0 Single transfer (18 bits) interface (16 bits) 2-transfer 80-system 9-bit st nd st nd 0 0 1 DB17-9 2-transfer (1 : 9 bits, 2 : 9 bits) (1 : 8 bits, 2 : 8 interface bits) Single transfer (16 bits) 80-system 16-bit DB17-10, st nd Single transfer 0 1 0 2-transfer (1 : 2 bits, 2 : 16 bits) interface DB8-1 st nd (16 bits) 2
Resumo do conteúdo contido na página número 13
R61509V Target Spec 4. Graphics RAM (GRAM) GRAM stands for graphics RAM, which can store bit-pattern data of 233,280 (240RGB x 432 (dots) x 18(bits)) bytes at maximum, using 18 bits per pixel. 5. Grayscale Voltage Generating Circuit The grayscale voltage generating circuit generates liquid crystal drive voltages according to the grayscale data in the γ-correction registers to enable 262k-color display. For details, see the γ-Correction Register section. 6. Liquid Crystal Driv
Resumo do conteúdo contido na página número 14
R61509V Target Spec Pin Function Table 5 External Power Supply When not Signal I/O Connect to Function used Power supply for Internal VDD regulator. Power VCC I ― supply VCC≧IOVCC Power IOVCC I Power supply for interface pins. ― supply Power GND I GND level for internal logic and interface pins. GND=0V. ― supply Power VCI I Power supply for liquid crystal power supply analog circuit. ― supply Reference Connect to an external power supply at the same level
Resumo do conteúdo contido na página número 15
R61509V Target Spec 18-bit parallel bi-directional data bus for 80-system interface operation (Amplitude: IOVCC-GND). 8-bit I/F: DB17-DB10 are used. 9-bit I/F: DB17-DB9 are used. 16-bit I/F: DB17-DB10 and DB8-1 are used. Host GND / 18-bit I/F: DB17-DB0 are used. DB[17:0] I/O processor IOVCC 18-bit parallel bi-directional data bus for RGB interface operation (Amplitude: IOVCC-GND). 16-bit I/F: DB17-DB13 and DB11-1 are used. 18-bit I/F: DB17-DB0 are used. Data enable s
Resumo do conteúdo contido na página número 16
R61509V Target Spec Reset protect pin. The R61509V enters a reset protect status by fixing PROTECT to GND level disabling hardware reset. With Host this, erroneous operations caused by noise are prevented. PROTECT I IOVCC processor Low: Hardware reset is disabled (Reset protect status) High: Hardware reset is enabled. (Normal status) Table 7 Internal Power Supply Circuit When Connect Signal I/O Function not to used Stabilizing Output from internal logic
Resumo do conteúdo contido na página número 17
R61509V Target Spec Table 8 LCD drive When not in Signal I/O Connect to Function use VREG1OUT O Stabilizing Output voltage generated from the reference voltage VCIR. The factor capacitor is determined by instruction (VRH bits). VREG1OUT is used for (1) source driver grayscale reference voltage ― VREG1OUT, (2) VCOMH level reference voltage, and (3) VCOM amplitude reference voltage. Connect to a stabilizing capacitor. VREG1OUT =4.0V ~ (DDVDH – 0.5)V VCOM O TFT panel Powe
Resumo do conteúdo contido na página número 18
R61509V Target Spec Table 9 Others (test, dummy pins) When not in Signal I/O Connect to Function use VTEST O Open Test pin. Leave open. Open VREFC I GND Test pin. Make sure to fix to the GND level. - VREFD O Open Test pin. Leave open. Open VREF O Open Test pin. Leave open. Open VDDTEST I GND Test pin. Make sure to fix to the GND level. - VMON O Open Test pin. Leave open. Open VCIR O Open Test pin. Leave open. Open GNDDUM1- O - Pins to fix the electrical potentia
Resumo do conteúdo contido na página número 19
R61509V Pad Arrangement Rev 0.6 Rev0.00 2007.12.13 First virsion Rev0.10 2007.12.27 R61517's VCOMA, VCOMB --> R61509V's VCOM Rev0.20 2008.02.13 Rev Mark 1 PAD No. 24～28, 71, 72, 208-217 changed to NC1-NC17 Rev0.21 2008.02.14 Rev Mark 2 NC's application voltage decided. Rev0.30 2008.02.19 Rev Mark 4 VPP3C-->VPP3B, VPP2-->VPP1 Rev0.31 2008.02.27 Rev Mark 5 NC1-5-->DUMMYA (1-a) NC6-7-->DUMMYB
Resumo do conteúdo contido na página número 20
R61509V Target Spec ●Chip size: 19.03mm x 0.76mm ●Chip thickness: 280μm (typ) ●Pad coordinates: Pad center ●Coordinate origin: Chip center ●Au bump size 1. 50μm x 90μm (I/O side: No.1-262) 2. 15μm x 100μm (LCD output side: No.263-1434) ●Au bump pitch: See pad coordinate ●Au bump height:12μm ● Alignment mark Table 10 Alignment marks X-axis Y-axis (1-a) -9381.0 -251.0 Type A (1-b) 9381.0 -251.0 1-a: ( Left Alignment Mark ) 1-b: ( Right Alignment Mark ) 150um : A
