Manual do usuário SMSC LPC47M997

Resumo do conteúdo contido na página número 1

LPC47M997

LPC Super I/O with
Hardware Monitoring
Block


Data Brief

Product Features
3.3 Volt Operation (SIO Block is 5 Volt Tolerant) Keyboard Controller
− 8042 Software Compatible
LPC Interface
− 8 Bit Microcomputer
ACPI 1.0/2.0 Compliant
− 2k Bytes of Program ROM
Fan Control
− 256 Bytes of Data RAM
− Fan Speed Control Outputs (2)
− Four Open Drain Outputs Dedicated for
− Fan Tachometer Inputs (2)
Keyboard/Mouse Interface
Programmable Wake-up Event Interface

Resumo do conteúdo contido na página número 2

LPC Interface Phoenix Keyboard BIOS ROM − Multiplexed Command, Address and Data Bus 128 Pin QFP, lead-free RoHS compliant − Serial IRQ Interface Compatible with Serialized IRQ package, 3.2mm footprint Support for PCI Systems − PME Interface Hardware Monitor − Monitor Power supplies (+2.5V, +3.3V, +5V, +12V, +1.8V, +1.5V, Vccp (processor voltage), and VCC or HVSB) − Remote Thermal Diode Sensing for Two External Temperature Measurements − Internal Ambient Tempera

Resumo do conteúdo contido na página número 3

80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright © 2007 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsib

Resumo do conteúdo contido na página número 4

RDATA, WDATA MTR0, MTR1*,TRK0, INDEX, WRTPRT WGATE, HDSEL DRVDEN0*, DRVDEN1* DIR, STEP, DSKCHG, DS0, DS1* D0- D0+ D1- D1+ Block Diagram CLK32 2nd Infrared Port Game Port Fan Control LEDs CLOCK CLOCKI GEN PD[7,0] SER_IRQ SERIAL Multi-Mode Busy, Slct, PE, PCI_CLK IRQ Parallel Port ERROR, ACK with TM ChiProtect / LAD[3:0] Internal Bus STROBE, INIT, SLCTIN, FDC MUX (Data, Address, and Control lines) ALF LPC (see LPC47B27x) LFrame Bus Interface LDRQ PCI_RESET TXD1, RXD1 LPCPD High-Speed CTS1, RT

Resumo do conteúdo contido na página número 5

Package Outline Figure 2 - 128 PIN QFP Package Outline, 14x20x2.7 Body, 3.2 mm Footprint Table 1 - 128 PIN QFP Package Parameters MIN NOMINAL MAX REMARKS A ~ ~ 3.4 Overall Package Height A1 0.05 ~ 0.5 Standoff A2 2.55 ~ 3.05 Body Thickness D 23.00 23.20 23.40 X Span D1 19.90 20.00 20.10 X body Size E 17.00 17.20 17.40 Y Span E1 13.90 14.00 14.10 Y body Size H 0.09 ~ 0.20 Lead Frame Thickness L 0.73 0.88 1.03 Lead Foot Length L1 ~ 1.60 ~ Lead Length e 0.50 Basic Lead Pitch o