Resumo do conteúdo contido na página número 1
CY7C1041DV33
4 Mbit (256K x 16) Static RAM
Features Functional Description
[1]
■ Pin and function compatible with CY7C1041CV33 The CY7C1041DV33 is a high performance CMOS Static RAM
organized as 256K words by 16 bits. To write to the device, take
■ High speed
Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte
❐ t = 10 ns
LOW Enable (BLE) is LOW, then data from IO pins (IO to IO )
AA
0 7
is written into the location specified on the address pins (A to
0
■ Low active power
A ). If Byte HI
Resumo do conteúdo contido na página número 2
CY7C1041DV33 Selection Guide [2] Description –10 (Industrial) –12 (Automotive) Unit Maximum Access Time 10 12 ns Maximum Operating Current 90 95 mA Maximum CMOS Standby Current 10 15 mA Pin Configuration Figure 1. 44-Pin SOJ/TSOP II A A 1 44 0 17 A A 2 1 43 16 A A 3 2 42 15 A 4 OE 3 41 A 5 4 40 BHE 6 39 CE BLE IO 7 38 IO 0 15 IO 8 37 IO 1 14 IO 9 IO 2 36 13 IO 10 35 IO 3 12 V 11 34 V CC SS V 12 SS 33 V CC IO 4 13 32 IO 11 IO 14 IO 5 31 10 IO IO 6 15 30 9 IO 16 29 IO 7 8 28 WE 17 NC A 5 18 27 A
Resumo do conteúdo contido na página número 3
CY7C1041DV33 Current into Outputs (LOW) ........................................ 20 mA Maximum Ratings Static Discharge Voltage............. ...............................>2001V Exceeding maximum ratings may shorten the useful life of the device. These user guidelines are not tested. (MIL-STD-883, Method 3015) Storage Temperature ................................. –65 °C to +150 °C Latch Up Current ..................................................... >200 mA Ambient Temperature with Power Appl
Resumo do conteúdo contido na página número 4
CY7C1041DV33 [6] Capacitance Parameter Description Test Conditions Max Unit C Input Capacitance T = 25 °C, f = 1 MHz, V = 3.3V 8 pF IN A CC C IO Capacitance 8 pF OUT [6] Thermal Resistance FBGA SOJ TSOP II Parameter Description Test Conditions Unit Package Package Package Θ Thermal Resistance (Junction Still Air, soldered on a 3 × 4.5 inch, 27.89 57.91 50.66 °C/W JA to Ambient) four layer printed circuit board Θ Thermal Resistance (Junction 14.74 36.73 17.17 °C/W JC to Case) AC Test Loads and Wa
Resumo do conteúdo contido na página número 5
CY7C1041DV33 [8] AC Switching Characteristics Over the Operating Range –10 (Industrial) –12 (Automotive) Parameter Description Unit Min Max Min Max Read Cycle [9] t V (Typical) to the First Access 100 100 μs power CC t Read Cycle Time 10 12 ns RC t Address to Data Valid 10 12 ns AA t Data Hold from Address Change 3 3 ns OHA t CE LOW to Data Valid 10 12 ns ACE t OE LOW to Data Valid 5 6ns DOE t OE LOW to Low-Z 0 0 ns LZOE [10, 11] t OE HIGH to High-Z 5 6ns HZOE [11] t CE LOW to Low-Z 3 3 ns LZCE
Resumo do conteúdo contido na página número 6
CY7C1041DV33 Data Retention Characteristics Over the Operating Range [14] Parameter Description Conditions Min Max Unit V V for Data Retention 2.0 V DR CC I Data Retention Current V = V = 2.0V, Ind’l 10 mA CCDR CC DR CE > V – 0.3V, CC Auto 15 mA V > V – 0.3V or V < 0.3V IN CC IN [6] t Chip Deselect to Data Retention Time 0 ns CDR [15] t Operation Recovery Time t ns R RC Data Retention Waveform DATA RETENTION MODE 3.0V 3.0V V V > 2V DR CC t t CDR R CE Switching Waveforms [16, 17] Figure 4. R
Resumo do conteúdo contido na página número 7
CY7C1041DV33 Switching Waveforms (continued) [17, 18] Figure 5. Read Cycle No. 2 (OE Controlled) ADDRESS t RC CE t ACE OE t HZOE t DOE BHE, BLE t LZOE t HZCE t DBE t LZBE t HZBE HIGH IMPEDANCE HIGH IMPEDANCE DATA OUT DATA VALID t LZCE t PD I t ICC CC V PU CC 50% 50% SUPPLY IISB CURRENT SB [19, 20] Figure 6. Write Cycle No. 1 (CE Controlled) t WC ADDRESS t t SA SCE CE t AW t HA t PWE WE t BW BHE, BLE t t SD HD DATAIO Notes 18. Address valid prior to or coincident with CE transition LOW. 19. Da
Resumo do conteúdo contido na página número 8
CY7C1041DV33 Switching Waveforms (continued) Figure 7. Write Cycle No. 2 (BLE or BHE Controlled) t WC ADDRESS t t SA BW BHE,BLE t AW t HA t PWE WE t SCE CE t t SD HD DATAIO [19, 20] Figure 8. Write Cycle No. 3 (WE Controlled, OE HIGH During Write) t WC ADDRESS t SCE CE t t AW HA t t SA PWE WE OE BHE,BLE t SD t HD DATA IO NOTE 21 DATAIN VALID t HZOE Note 21. During this period the IOs are in the output state and input signals should not be applied. Document #: 38-05473 Rev. *E Page 8 of 13 [+
Resumo do conteúdo contido na página número 9
CY7C1041DV33 Switching Waveforms (continued) Figure 9. Write Cycle No. 4 (WE Controlled, OE LOW) t WC ADDRESS t SCE CE t AW t HA t SA t PWE WE t BW BHE, BLE t HZWE t t SD HD DATA IO NOTE 21 t LZWE Truth Table IO –IO IO –IO Mode Power CE OE WE BLE BHE 0 7 8 15 H X X X X High-Z High-Z Power Down Standby (I ) SB L L H L L Data Out Data Out Read All Bits Active (I ) CC L L H L H Data Out High-Z Read Lower Bits Only Active (I ) CC L L H H L High-Z Data Out Read Upper Bits Only Active (I ) CC L X L L
Resumo do conteúdo contido na página número 10
CY7C1041DV33 Ordering Information Speed Package Operating (ns) Ordering Code Diagram Package Type Range 10 CY7C1041DV33-10BVI 51-85150 48-Ball VFBGA Industrial [4] CY7C1041DV33-10BVXI 48-Ball VFBGA (Pb-Free) Pinout - 1 [4] CY7C1041DV33-10BVJXI 48-Ball VFBGA (Pb-Free) Pinout - 2 CY7C1041DV33-10VXI 51-85082 44-Pin (400-mil) Molded SOJ (Pb-Free) CY7C1041DV33-10ZSXI 51-85087 44-Pin TSOP II (Pb-Free) 12 CY7C1041DV33-12BVXE 51-85150 48-Ball VFBGA (Pb-Free) Automotive CY7C1041DV33-12VXE 51-85082 44-P
Resumo do conteúdo contido na página número 11
CY7C1041DV33 Package Diagrams(continued) Figure 11. 44-Pin (400-mil) Molded SOJ (51-85082) 51-85082-*B Figure 12. 44-Pin TSOP II (51-85087) 51-85087-*A Document #: 38-05473 Rev. *E Page 11 of 13 [+] Feedback [+] Feedback
Resumo do conteúdo contido na página número 12
CY7C1041DV33 Document History Page Document Title: CY7C1041DV33 4 Mbit (256K x 16) Static RAM Document Number: 38-05473 Orig. of Submission Rev. ECN No. Description of Change Change Date ** 201560 SWI See ECN Advance Data sheet for C9 IPP *A 233729 RKF See ECN 1.AC, DC parameters are modified as per EROS(Spec # 01-2165) 2.Pb-free offering in the ‘Ordering information’ *B 351117 PCI See ECN Changed from Advance to Preliminary Removed 15 and 20 ns Speed bin Corrected DC voltage (min) value in ma
Resumo do conteúdo contido na página número 13
CY7C1041DV33 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Solutions PSoC psoc.cypress.com General psoc.cypress.com/solutions Clocks & Buffers clocks.cypress.com Low Power/Low Voltage psoc.cypress.com/low-power Wireless wireless.cypress.com Precision Analog psoc.cypress.co
