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FuturePlus Systems Corporation
FS2010 Users Manual
For use with Agilent Logic Analyzers
Revision – 1.1
Copyright 2005 FuturePlus® Systems Corporation
FuturePlus is a trademark of FuturePlus Systems Corporation
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How to reach us ......................................................................................... 4 Product Warranty....................................................................................... 5 Limitation of Warranty ...................................................................................5 Exclusive Remedies....................................................................................................5 Assistance............................................
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Use of EyeFinder/Eyescan .............................................................................27 Transaction Viewer.................................................................................. 28 General Information................................................................................ 29 Characteristics................................................................................................29 State/Timing Adapter Probe Interface Compatibility ...................
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How to reach us For Technical Support: FuturePlus Systems Corporation 36 Olde English Road Bedford NH 03110 TEL: 603-471-2734 FAX: 603-471-2738 On the web http://www.futureplus.com For Sales and Marketing Support: FuturePlus Systems Corporation TEL: 719-278-3540 FAX: 719-278-9586 On the web http://www.futureplus.com FuturePlus Systems has technical sales representatives in several major countries. For an up to date listing please see http://www.futureplus.com/contact.ht
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Product Warranty This FuturePlus Systems product has a warranty against defects in material and workmanship for a period of 1 year from the date of shipment. During the warranty period, FuturePlus Systems will, at its option, either replace or repair products proven to be defective. For warranty service or repair, this product must be returned to the factory. Due to the complex nature of the FS2010 and the wide variety of customer target implementations, the FS2010 has a 30 day acceptanc
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Introduction The FS2010 is a 32/64 bit, 0 to 133Mhz PCI-X State and Timing adapter probe for use with Agilent logic analyzers. This card has a universal card edge connector and a 3.3v extender card connector. The FS2010 PCI-X State/Timing adapter probe and extender card performs three functions. • The first is to act as an extender card, physically extending a module up approximately 1.5 inches from the motherboard connector. • The second is to provide a complete timing analysis inte
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Analyzing the PCI-X Local Bus This chapter introduces you to the FS2010 and lists the minimum equipment required and accessories supplied for PCI-X Local Bus analysis. This chapter also contains information that is common to both state and timing analysis. The FS2010 product consists of the following accessories: Accessories Supplied • The FS2010 probe. • 1 Diskette containing the configuration files and the FS2010 PCI-X decoder for 167xx analyzer. • A CD containing the setup f
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This operating manual uses the same signal notation as the PCI-X Signal Naming LOCAL BUS SPECIFICATION - REVISION 1.0 That is, a # symbol at the Conventions end of a signal name indicates that the signal’s active state occurs when it is at a low voltage. The absence of a # symbol indicates that the signal is active at a high voltage. When connecting the logic analyzer cards to the FS2010 it is necessary Determining which to know which logic analyzer card in which slot has been c
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Configuration Files 167xx Analyzer 169xx Analyzer File name for Description State/Timing Analysis 16715/6/7/9 or 1680/90, CP210_1 *2 card state 1674X or 16750/1/2, analysis 16750/1/2 1691x 16715/6/7/9 or 1680/90, CP210_2 *2 card timing 1674X or 16750/1/2, 16750/1/2 1691x 16715/6/7/9 or 1680/90, CP210_3 1 card eyefinder 1674X or 16750/1/2, config 16750/1/2 1691x 16753/4/5/6 16753/4/5/6, CP210_4 1 card eyescan 1691x config *For 32 bit analysis load the timing or state co
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The following explains how to connect the logic analyzer to the FS2010 Connecting the for either state or timing analysis: 167xx Agilent logic 1. Connect the logic analyzer PODs 3 adapter cables, either the analyzer to the E5378A or E5385A depending on the logic analyzer cards used. FS2010 2. Plug the Adapter cables into the probe as shown in the table below. 167XX/1655X PCI-X Analysis Probe Comment connector Master POD 1 J2 odd J CLK Master POD 2 J2 even Master POD 3 J3 od
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To install the FS2010 software, insert the diskette labeled 16700/702 Setting up the 167xx Installation disk for the FS2010 into the Agilent 16700 diskette drive. Analyzer From the SYSTEM ADMINISTRATION TOOLS select INSTALL under SOFTWARE. From the SOFTWARE INSTALL screen select the FLEXIBLE DISK and APPLY. Once the title appears select it and then select INSTALL. This procedure does not need to be repeated. It only needs to be done the first time the PCI-X Analysis Probe is
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The 1680/90/900 Analyzer is a PC based application that requires a PC Setting up the running Windows OS with the Agilent logic analyzer software installed or 1680/90/900 Analyzer a 16900 frame. Before installing the protocol decoder for the PCI-X protocol on a PC you must install the Agilent logic analyzer software. Once the Agilent logic analyzer software is installed, you can install the FS2010 protocol decoder by placing the CD-ROM disk into the CD-ROM drive of the target compu
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Data that is saved on a 167xx analyzer in fast binary format, or 16900 Offline Analysis analyzer data saved as a *.ala file, can be imported into the 1680/90/900 environment for analysis. You can do offline analysis on a PC if you have the 1680/90/900 operating system installed on the PC, if you need this software please contact Agilent. Offline analysis allows a user to be able to analyze a trace offline at a PC so it frees up the analyzer for another person to use the analy
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After clicking “next” you must browse for the fast binary data file you want to import. Once you have located the file and clicked start import, the data should appear in the listing. After the data has been imported you must load the protocol decoder before you will see any decoding. To load the decoder select Tools from the menu bar, when the drop down menu appears select Inverse Assembler, then choose the name of the decoder for your particular product. The figure below is a g
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After the decoder has loaded, select Preferences if required, from the overview screen and set the preferences to their correct value in order to decode the trace properly. This is a general requirement, some decoders do not have preferences, and if this is the case then no preference setting is necessary. 15
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The FS2010 diskette sets up the format menu as shown in the following The Format Menu table. This format is the same for both Timing and State Analysis. Label Clk Inputs Pod 6 Pod 5 Pod 4 Pod 3 Pod 2 Pod 1 ADDR 11,10,9,8,6,5,4,3 11,10,9,6,5,4,3,2 8,7,6,5,3,2,1,0 10:3 ADDR_B 15:0 15:0 STAT K,J,M,L,K 14,13,7,2,1 12,1,0 11,2,1 CLK J AD_HI 15:0 15:0 AD_LO 11,10,9,8,6,5,4,3 11,10,9,6,5,4,3,2 8,7,6,5,3,2,1,0 10:3 FRAME# 14 IRDY# 2 TRDY# M
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Loading the configuration file will automatically load the PCI-X The PCI-X Transaction Decode software onto the workspace. If this does not happen then check to make sure that the PCI-X decode software was Transaction Decode properly installed Software 17
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FS2010 Software and Timing mode The FS2010 Decoder should NOT be run when the logic analyzer is configured in timing mode. This will cause the system to hang. The ADDR and DATA variables in the FORMAT menu are assigned to The ADDR, ADDR_B and the AD[31:0] signals on the PCI-X bus. The ADDR_B is the AD[63:32] signals on the PCI-X bus. DATA variables 18
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The CYCLE variable is made up of the following signals: TRDY#, The CYCLE variable FRAME#, IRDY#, C/BE(3:0), DEVSEL# , and STOP#. This variable has 27 symbols defined that can be used to help make triggering, timing analysis and pattern filtering easier. The following lists the bit pattern and the corresponding symbol. Symbol C/BE(3:0 FRAME# IRDY# DEVSEL# TRDY# STOP# ) INTACK 0000 0 1 1 1 1 SPECIAL CYCLE 0001 0 1 1 1 1 I/O READ 0010 0 1 1 1 1 I/O WRITE 0011 0 1 1 1 1 RESERVED 010
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The TERM CODE variable is made up of DEVSEL#, TRDY#, and STOP#. The following lists the bit pattern and the corresponding symbol. Symbol DEVSEL#TRDY# STOP# MASTER ABORT 1 1 1 SPLIT RESPONSE 1 0 1 TARGET ABORT 1 1 0 SINGLE DATA DISC 1 0 0 RETRY 0 1 0 DISC NXT ADB 0 0 0 The hardware layout of the FS2010 made it impossible for the signals to Bit Re-ordering be connected to the logic analyzer in a logical order. Therefore, bit re- ordering is done in the configuration file to
