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MICROLINE 3390/3391
PRINTER
Maintenance Manual
All specifications are subject to change without notice.
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PREFACE This maintenance manual describes how to maintain the Microline 3390/3391 printer in the field. This manual is for customer engineers. For further information, refer to the Users Manual for handling or operating the equipment. iii
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TABLE OF CONTENTS 1. CONFIGURATION 1.1 Standard Printer Configuration 1.2 Options 2. THEORY OF OPERATION 2.1 Electrical Operation 2.1.1 Summary 2.1.2 Microprocessor and the Peripheral Circuit 2.1.3 Initialization 2.1.4 Parallel Interface Control 2.1.5 Print Control 2.1.6 SP/LF Motor Control 2.1.7 Operation Panel 2.1.8 Alarm Circuit 2.1.9 Power Supply Circuit 2.2 Mechanical Operation 2.2.1 Printhead Mechanism and Operation 2.2.2 Spacing Operation 2.2.3 Head Gap Adjusting 2.2.4 Ribbon Drive 2.2.5
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3.3.9 Carriage Cable 3.3.10 Backup Roller Holder Assy 3.3.11 Platen Assy 3.3.12 Driver Board (SRXD) 3.3.13 LF Motor 3.3.14 Operation Panel PCB (LEOP) 3.3.15 Control/Power Supply Board (SRXC) 3.3.16 Transformer Assy 3.3.17 Change Lever and Gears 3.3.18 Carriage Shaft 3.3.19 Paper Pan 3.3.20 Rear Tractor Assy 3.3.21 Rear Pressure Assy 3.3.22 Switch Lever 4. ADJUSTMENT 5. CLEANING AND LUBRICATION 5.1 Cleaning 5.2 Lubrication 6. TROUBLESHOOTING AND REPAIR 6.1 Items to Check Before Repair 6.2 Trouble
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1. CONFIGURATION
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1. CONFIGURATION 1.1. Standard Printer Configuration This printer consists of the following assemblies: Sheet guide assy Platen knob Access cover assy Upper cover Transformer assy Pull-up roller assy Control/Power supply assy Driver board Operation panel assy Main frame Figure 1-1 Configuration 1 – 1
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1.2 Options (1) Cut sheet feeder unit (CSF) (Narrow and wide versions available) Dual-bin CSF Single-bin CSF Attachment assy (2) Pull-tractor assy 1 – 2
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(3) Bottom push tractor unit (4) Roll paper stand (Narrow only) (5) Serial I/F • RS232C • RS422A • Current Loop 1 – 3
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2. THEORY OF OPERATION
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2. THEORY OF OPERATION 2.1 Electrical Operation The electrical operation of the printer circuit is described in this section. 2.1.1 Summary Fig. 2-1 shows the block diagram of the printer. The control board is made up of the microprocessors, peripheral circuits, drive circuits, sensors and interface connectors. The power to the control board is supplied by the power board through the connector cord. The power to other electrical parts is also distributed through the connectors within the control
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2 – 2 (opt.)
AD-BUS
67 x 640
CSF
LSI
ADDRESS
Roll paper
stand
12.288
ROM
DRAM
ROM
MHz
(opt.)
max
4*64
Para-
max
RS232C-
16M
Kbit*2
I/F
I/F
4M
4
TSD
AI
Vcc-Level
EEPROM
TSD
Head
1Kbits
SEL-N
driver
I/F-IPT
Alarm-Odd
Print-IPT
Alarm-Even
2P Encoder
INT
Release-SW
Bottom-SW
SP
M
SP
PE-SENSOR
driver
Serial
OPERATION
SP alarm
PANEL
LF
M
LF
driver
Alarm-Odd
Alarm
Alarm-Even
-circuit
SP-Alarm
Fuse
RESET
Reset
circuit
5VD
40 V
Vcc-L
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(2) Program ROM This is a 256 × 16 bits (4M bit) [MAX] EPROM with the control program for the printer stored. The MPU executes instructions under this program. The program ROM is assigned to the program memory area of the MPU and is fetched by the PSEN signal of the MPU. The following shows the operation of the memory access. MPU ROM A0~A17 D0~D15 PG-N CSO CE PSEN OE MPU CLOCK A0~A17 PG-N PSEN-N Program Program Program D0~D15 IN IN IN 2 – 3
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(3) RAM (MSM51C464A-80RS) The RAM is CMOS dynamic RAM with (64K × 4-bit) × 2 configuration, and used as buffers (such as receiving buffer, printing buffer, DLL buffer and working buffer). The following shows the examples of the memory access operation. MPU RAM 1 (Q3) A0~A7 RAM 2 (Q4) P03 RAS CS1 CAS D0~D3 D4~D7 RD OE Clockout* T1 T2 T3 A0~A7 CS1~CS4 RD D0~D7 (Read) WRH WRL D0~D7 (Write) 8-bit bus, byte instruction * Clockout is provided when the original excitation is selected. 2 – 4
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(4) CG ROM This is a 1024K × 16 bits (16M bits) MASK ROM with the font data for the characters stored. CG ROM is assigned to the program memory area of the MPU and is fetched by the PSEN signal of the MPU. The following shows the memory access operation. MPU
ROM
A0~A19
D0~D15
CG-N
P02
CE
PSEN
OE
MPU CLOCK
A0~A19
CG-N
PSEN-N
Program
Program
Program
D0~D15
IN
IN
IN
2 – 5
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(5) EEPROM The EEPROM is a CMOS serial I/O type memory which is capable of electrically erasing and writing 1,024 bits. The EEPROM contains menu data. The following shows the memory access operation. MPU EEPROM EEDIN-P P24 D1 EECS-P P27 CS EEDOUT-P P25 DO EECLK-P SK P26 PRE = O PE = X EECS-P t CS EECLK-P Operation Start Address code code 0 1 1 EEDIN-P A5 A0 0 EEDOUT-P D15 D0 D15 D0 D15 Read cycle timing (READ) PRE = O PE t CS EECS-P EECLK-P Operation Start Address Data
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(6) LSI This LSI detects and controls the SP motor speeds by monitoring the two phase sensor signals obtained from the DC motors and modifying the excitation phases as appropriate. This LSI is connected in multiplex to the MPU. MPU LSI A/D bus P07 ALE RD RDN WRL WRL P01 LSIC Clockout* A0~A19 LSICS ALE D0~D15 Address Data (Read) RD D0~D15 Address Data (Write) WRL * Clockout is provided when the original excitation is selected. 2 – 7
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2.1.3 Initialization This printer is initialized when the power is turned on or when the I-PRIME-N signal is input from the host side via the parallel interface. For the initialize operation, the RST-N signal is first output from the reset circuit to reset the MPUs and LSIs. When resetting ends, the program starts and the LSIs are reset by MPU via LSIRST-N. Reset operation by I-PRIME starts program to initialize, but does not reset the MPU. The program here sets the mode of the LSI including the
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2.1.4 Parallel Interface Control The parallel data input from the host to the interfaced LSI is latched to its internal register at the falling edge of the STROBE-N signal. At the same time, the LSI sets the BUSY signal to the high level to inform the host that the data is being processed, and outputs the RXD signal to inform the MPU of data reception. The data is read upon receiving the RD-N signal from the MPU. When the data processing ends, the BUSY signal is set to off and the ACK-N signal i
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2.1.5 Print Control Print data is transmitted as parallel data (HEAD1~HEAD24) from LSI to print head. LSI generates print timing and drive time. Control/Power Supply Board Driver Board MPU LSI A/D bus DRIVER Print Head Print Data Print Data HEAD1-N~ HEAD1~ HEAD24-N HEAD24 HEAD DRIVE TIMING CHART DT1 DT2 HEAD DRIVE CURRENT 2 – 10
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Print Compensation Control The print compensation can be made as shown below: (a) Voltage compensation (See 2.1.8 “Alarm Circuit.”) (b) Temperature compensation (See 2.1.8 “Alarm Circuit.”) (c) Pin stroke compensation Platen Print Head Pin 1~4 As shown in the drawing left, the stroke length up to the platen is different for each pin. 5~20 21~24 Pin coil current Pin 1~4, 21~24 Pin 5~20 Time (d) Simultaneous Compensation of the number of impact pins The LSI is provided with the compensation table
