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MicroBlaze
Microcontroller
Reference Design
User Guide v1.3.1
UG133 v1.3.1 January 7, 2005
R
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R "Xilinx" and the Xilinx logo shown above are registered trademarks of Xilinx, Inc. Any rights not expressly granted herein are reserved. CoolRunner, RocketChips, Rocket IP, Spartan, StateBENCH, StateCAD, Virtex, XACT, XC2064, XC3090, XC4005, and XC5210 are registered trademarks of Xilinx, Inc. The shadow X shown above is a trademark of Xilinx, Inc. ACE Controller, ACE Flash, A.K.A. Speed, Alliance Series, AllianceCORE, Bencher, ChipScope, Configurable Logic Cell, CORE Generator, CoreLINX,
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MicroBlaze Microcontroller Ref Des User Guide UG133 v1.3.1 January 7, 2005 The following table shows the revision history for this document. Version Revision 7/22/04 1.0 Initial Xilinx release. 8/27/04 1.1 Edited content; imported new images 11/19/04 1.2 Reconfigured book; added new chapter; incorporated edits 11/30/04 1.3 Reformatted book to consist of chapters for Overview and RefDes1 1/7/05 1.3.1 Made minor non-technical changes only. UG133 v1.3.1 January 7, 2005 www.xilinx.com MicroBlaze
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About This Guide Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Additional Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Conventions . . . . . . . . . . . . . . . . . . . . . . . . .
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R About This Guide Introduction This user guide contains information on how to integrate the stand-alone, prebuilt, MicroBlaze Microcontroller reference design into an FPGA. Although this design is targeted initially for the Xilinx Spartan-3 Starter Kit Board, the design may be modified readily for any Xilinx or third party platform. This guide is an aid in getting started and learning how to use the Xilinx Embedded Development Kit (EDK) tools. It does this through examples, which show ho
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R Additional Resources Additional Resources For additional information, go to http://support.xilinx.com. The following table lists some of the resources available from this website. You can also directly access these resources using the provided URLs. Resource Description/URL Tutorials Tutorials covering Xilinx design flows, from design entry to verification and debugging http://support.xilinx.com/support/techsup/tutorials/index.htm Answer Browser Database of Xilinx solution records http://su
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R Conventions Convention Meaning or Use Example Variables in a syntax statement for which you must ngdbuild design_name supply values See the Development System Italic font References to other manuals Reference Guide for more information. If a wire is drawn so that it Emphasis in text overlaps the pin of a symbol, the two nets are not connected. An optional entry or parameter. However, in bus ngdbuild [option_name] Square brackets [ ] specifications, such as design_name bus[7:0], they
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R Microcontroller Reference Design Overview Introduction When selecting an embedded microcontroller, typically an engineer will list the required features and then select a stand alone, off the shelf microcontroller or processor that has those features. In most cases there are additional features or peripherals that are not need, but are included non-the less. When using a Soft Processor in an FPGA an engineer has an opportunity to select from pre-created microcontroller hardware images,
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R Reference Design Building Blocks MicroBlaze Microcontroller Reference Design Number 1 Reference Design Building Blocks The block diagram of the MicroBlaze Microcontroller used in this MicroBlaze Microcontroller Reference Design is shown in Figure 2-1. The design includes an Internal Block RAM memory, an RS232 UART, 4 GPIO blocks, and a JTAG_UART used for software debugging. This configuration utilizes approximately 50% of a Spartan-3™ XC3S200 device. Figure Top x-ref 2-1 Clock MicroBlaze
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R Features: Features: • MicroBlaze Microprocessor ♦ 50 MHz on the Spartan-3 Starter Kit Board, derived from the 50 MHz crystal on board ♦ Instruction cache and data cache options disabled ♦ 32 32-bit general purpose registers with 32-bit address and 32-bit data buses ♦ Single cycle execution ♦ Direct access to the register file using Fast Simplex Link (FSL) • Unified instruction and data BRAM into single memory for both instruction and data segments ♦ Dual port 16 KB internal blockRAM memory
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R Getting Started Getting Started System Requirements The following software must be installed on your PC to utilize this reference design: • Windows 2000 SP2/Windows XP • EDK 6.3 or later (Must be the same version as ISE) • ISE 6.3i or later To download the completed reference design, the following hardware is required: • Xilinx Spartan-3 Evaluation Board. For information on the evaluation board, see http://www.xilinx.com/products/spartan3/s3boards.htm. • Xilinx Parallel Cable used to program
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R Downloading the Design and Launching XPS Figure Top x-ref 2-2 Figure 2-2: Xilinx Platform Studio (XPS) Updating and Generation Hardware Files At this point XPS is open with the selected hardware application. No modifications are needed to run this design. All the hardware features and peripherals have been pre-loaded and pre-set. The Hardware Application can run any number of Software Applications. When the Base System Wizard is used to create a Hardware System, it also will create a simp
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R Downloading the Design and Launching XPS or, if all files are up to date, then it will say: ... make: Nothing to be done for `init_bram'. Done. Downloading Design Files to the FPGA The following two sections illustrate two methods of downloading a Software Application into the FPGA. The first method is when the Software Application can be incorporated into the FPGA bitstream. The second method illustrates loading a selected application into the FPGA using the GDB debugger for software deve
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R Downloading the Design and Launching XPS Figure 2-3: Software Selection when FPGA is Configured Loading the “Calculator_App” Software Application To configure the hardware system and to load the software application into the Spartan-3 Evaluation Board using the Digilent JTAG3 cable, perform the following steps: 1. Connect the Digilent JTAG3 cable to the J7 header on the Spartan-3 Evaluation Board and connect the other end to the parallel port of the PC. If using the Parallel Cable IV, make
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R Selecting a Software Application to be Loaded with a BOOT Loader after the FPGA is The Calculator_App is a simple 3 function calculator. The 3 right most push button switches are Add (BTN0), Sub (BTN1), Mult (BTN2). The left most push button switch (BTN3) is a program reset, which will clear the calculator program. If the reset is pushed at this time, then the FPGA will need to be re-loaded. The eight toggle switches directly under the 7-Segment display are divided into two 4 bit words. W
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R Selecting a Software Application to be Loaded with a BOOT Loader after the FPGA is loaded and run, and then a different Software Application can be loaded and run. In this example the MicroBlaze processor must be loaded with a Software Application through the use of a stub program. To select the stub application, perform the following steps: 1. Select the Application tab the XPS window. 2. Right click on Default: microblaze_0_xmdstub. 3. Set “Mark to Initialize BRAMs”. The Default: microbl
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R Selecting a Software Application to be Loaded with a BOOT Loader after the FPGA is 4. In XPS, to make sure that the ELF file is up to date, please “Tools>Update Bitstream”. Note: Close all other XMD and GDB windows prior to downloading a configuration bits. 5. In XPS, select “Tools>Download” to download the hardware configuration and load xmdstub into the BRAM memory. Note: Close all other XMD and GDB windows prior to downloading a configuration bits. 6. In XPS, select “Tools>XMD” to open
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R Additional MicroBlaze and EDK Information Loading the “Calculator_App” Software Application with XMD_STUB To download and execute the Calculator_App demonstration program, repeat the procedure in section ‘Loading the “TestApp” Software Application with XMD_STUB’ Start with step 1 and choose Calculator_App in step 5 instead of TestApp. See Running the Calculator_App program Additional MicroBlaze and EDK Information Congratulations, you have successfully integrated a MicroBlaze Microcontrolle
