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®
CY62137FV30 MoBL
2-Mbit (128K x 16) Static RAM
®
is ideal for providing More Battery Life™ (MoBL ) in portable
Features
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
■ Very high speed: 45 ns
consumption by 90% when addresses are not toggling. Placing
■ Temperature ranges
the device into standby mode reduces power consumption by
❐ Industrial: –40°C to +85°C more than 99% when deselected (CE HIGH or both BLE and
❐ A
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® CY62137FV30 MoBL Product Portfolio Power Dissipation V Range (V) Operating I (mA) CC CC Speed Standby I SB2 Product Range (ns) (μA) f = 1MHz f = f max [1] [1] [1] [1] Min Typ Max Typ Max Typ Max Typ Max CY62137FV30LL Ind’l/Auto-A 2.2V 3.0V 3.6V 45 1.6 2.5 13 18 1 5 Auto-E 2.2V 3.0V 3.6V 55 2 3 15 25 1 20 Pin Configuration [2, 3] [2] Figure 1. 48-Ball VFBGA Pinout Figure 2. 44-Pin TSOP II A A 126 3 4 5 1 4 44 5 A A 2 43 3 6 A A 3 42 7 A A A 2 OE NC A BLE 0 1 2 A 4 OE 41 1 A 5 0 40 BHE A A
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® CY62137FV30 MoBL [4, 5] DC Input Voltage .......................................–0.3V to 3.9V Maximum Ratings Output Current into Outputs (LOW) ............................ 20 mA Exceeding the maximum ratings may impair the useful life of the Static Discharge Voltage ......................................... > 2001V device. These user guidelines are not tested. (MIL–STD–883, Method 3015) Storage Temperature ................................ –65°C to + 150°C Latch up Current ...................
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® CY62137FV30 MoBL Thermal Resistance Tested initially and after any design or process changes that may affect these parameters. Parameter Description Test Conditions VFBGA TSOP II Unit Θ Thermal Resistance Still air, soldered on a 3 × 4.5 inch, 75 77 °C/W JA (Junction to Ambient) two layer printed circuit board Θ Thermal Resistance 10 13 °C/W JC (Junction to Case) AC Test Loads and Waveforms Figure 3. AC Test Loads and Waveform R1 ALL INPUT PULSES V CC V CC 90% 90% OUTPUT 10% 10% GND R2 30 p
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® CY62137FV30 MoBL Switching Characteristics [11, 12] Over the Operating Range 45 ns (Ind’l/Auto-A) 55 ns (Auto-E) Parameter Description Unit Min Max Min Max Read Cycle t Read Cycle Time 45 55 ns RC t Address to Data Valid 45 55 ns AA t Data Hold From Address Change 10 10 ns OHA t 45 55 ns CE LOW to Data Valid ACE t 22 25 ns OE LOW to Data Valid DOE [13] t 55 ns OE LOW to Low Z LZOE [13, 14] t 18 20 ns OE HIGH to High Z HZOE [13] t 10 10 ns CE LOW to Low Z LZCE [13, 14] t 18 20 ns CE HIGH t
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® CY62137FV30 MoBL Switching Waveforms [17, 18] Figure 5. Read Cycle 1: Address Transition Controlled t RC ADDRESS t AA t OHA DATA OUT PREVIOUS DATA VALID DATA VALID [18, 19] Figure 6. Read Cycle 2: OE Controlled ADDRESS t RC CE t PD t t HZCE ACE OE t HZOE t DOE t LZOE BHE/BLE t HZBE t DBE t LZBE HIGH IMPEDANCE HIGHI MPEDANCE DATA VALID DATA OUT t LZCE t PU I CC V 50% CC 50% I SUPPLY SB CURRENT Notes 17. The device is continuously selected. OE, CE = V , BHE and/or BLE = V . IL IL 18. WE is
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® CY62137FV30 MoBL Switching Waveforms (continued) [16, 20, 21] Figure 7. Write Cycle 1: WE Controlled t WC ADDRESS t SCE CE t t AW HA t t SA PWE WE t BW BHE/BLE OE t HD t SD NOTE 22 DATA DATA IO IN t HZOE [16, 20, 21] Figure 8. Write Cycle 2: CE Controlled t WC ADDRESS t SCE CE t SA t t AW HA t PWE WE t BW BHE/BLE OE t SD t HD DATA DATA IO NOTE 22 IN t HZOE Notes 20. Data IO is high impedance if OE = V . IH 21. If CE goes HIGH simultaneously with WE = V , the output remains in a high impeda
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® CY62137FV30 MoBL Switching Waveforms (continued) [21] Figure 9. Write Cycle 3: WE Controlled, OE LOW t WC ADDRESS t SCE CE t BW BHE/BLE t t AW HA t t SA PWE WE t HD t SD DATA IO NOTE 22 DATA IN t LZWE t HZWE [21] Figure 10. Write Cycle 4: BHE/BLE Controlled, OE LOW t WC ADDRESS CE t SCE t t AW HA t BW BHE/BLE t SA t PWE WE t HZWE t HD t SD NOTE 22 DATA DATA IO IN t LZWE Document Number: 001-07141 Rev. *F Page 8 of 12 [+] Feedback [+] Feedback
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® CY62137FV30 MoBL Truth Table CE WE OE BHE BLE Inputs or Outputs Mode Power H XXXX High Z Deselect or Power Down Standby (I ) SB X X X H H High Z Deselect or Power Down Standby (I ) SB L H L L L Data Out (IO –IO )Read Active (I ) 0 15 CC LH LH L Data Out (IO –IO ); Read Active (I ) 0 7 CC IO –IO in High Z 8 15 –IO ); ) L H L L H Data Out (IO Read Active (I 8 15 CC IO –IO in High Z 0 7 L H H L L High Z Output Disabled Active (I ) CC L H H H L High Z Output Disabled Active (I ) CC L H H L H Hig
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® CY62137FV30 MoBL Ordering Information Speed Package Operating Package Type (ns) Ordering Code Diagram Range 45 CY62137FV30LL-45BVI 51-85150 48-Ball VFBGA Industrial CY62137FV30LL-45BVXI 48-Ball VFBGA (Pb-free) CY62137FV30LL-45ZSXI 51-85087 44-Pin TSOP II (Pb-free) 45 CY62137FV30LL-45ZSXA 51-85087 44-Pin TSOP II (Pb-free) Automotive-A 55 CY62137FV30LL-55ZSXE 51-85087 44-Pin TSOP II (Pb-free) Automotive-E Contact your local Cypress sales representative for availability of these parts. Package Di
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® CY62137FV30 MoBL Package Diagram (continued) Figure 12. 44-Pin TSOP II 51-85087-*A Document Number: 001-07141 Rev. *F Page 11 of 12 [+] Feedback [+] Feedback
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® CY62137FV30 MoBL Document History Page ® Document Title: CY62137FV30 MoBL 2-Mbit (128K x 16) Static RAM Document Number: 001-07141 Issue Orig. of REV. ECN NO. Date Change Description of Change ** 449438 See ECN NXR New datasheet *A 464509 See ECN NXR Changed the I value from 1.0 μA to 0.5 μA SB2(typ) Changed the I value from 4 μA to 2.5 μA SB2(max) Changed the I value from 2 mA to 1.6 mA and I value from CC(typ) CC(max) 2.5 mA to 2.25 mA for f=1 MHz test condition Changed the I value from 15
