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USB2250/50i/51/51i
Ultra Fast USB 2.0 Multi-Slot
Flash Media Controller
Datasheet
PRODUCT FEATURES
GPIO configuration and polarity
General Description
The SMSC USB2250/50i/51/51i is a USB 2.0 compliant, high
— Up to 11 GPIOs (based on configuration) for special
speed Mass Storage Class Peripheral Controller intended for function use: LED indicators, button inputs, power
reading and writing to more than 24 popular flash media control to memory devices, etc. The number of actual
TM
GPIO’s de
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet ORDER NUMBER: USB2250/50i/51/51i-NU-XX for 128-pin, VTQFP Lead-Free RoHS Compliant Package “XX” in the order number indicates the internal ROM firmware revision level. Please contact your SMSC sales representative for more information. Table 0.1 USB2250/50i/51/51iComparison of Features CompactFlash® TM Memory Stick Secure Digital Part Number TM MultiMediaCard Operational xD Picture TM TM SmartMedia temperature Card USB2250 0ºC
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Table of Contents Chapter 1 Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Chapter 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Chapter 3 Pin Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 128-Pin Pac
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet List of Figures Figure 2.1 USB2250/50i/51/51i Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4.1 USB2250/50i/51/51i 128-Pin VTQFP Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 6.1 Pin Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 6.2 Leg
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet List of Tables Table 0.1 USB2250/50i/51/51iComparison of Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Table 3.1 USB2250/50i/51/51i 128-Pin VTQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 5.2 USB2250/50i/51/51i Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 7.1 Pin Capacitance. . . . . .
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Chapter 1 Acronyms CF: Compact Flash CFC: Compact Flash Controller EEPROM: Electrically Erasable Programmable Read-Only Memory FET: Field Effect Transistor LUN: Logical Unit Number MMC: MultiMediaCard MS: Memory Stick MSC: Memory Stick Controller PLL: Phase-Locked Loop RoHS: Restriction of Hazardous Substances Directive SD: Secure Digital SDIO: Secure Digital Input/Output SDC: Secure Digital Controllerl SIE: Serial Interface Engine S
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Chapter 2 Block Diagram SD/ AUTO_ MMC CBW PROC CF/ GPIO (16) USB FMI Host SIE BUS BUS FMDU PHY CTL INTFC INTFC CTL MS SM EP0 TX EP0 RX BUS RAM 4K INTFC total EP1 RX EP1 TX EP2 RX EP2 TX XDATA BRIDGE + BUS ARBITER PWR_FET0 GPIO8/CARD_PWR0 PWR_FET1 GPIO9/CARD_PWR1 PWR_FET2 GPIO10/CARD_PWR2 PWR_FET3 GPIO11/CARD_PWR3 GPIOs 11 pins RAM 10KB ADDR Program Memory I/O Bus MAP ROM 64KB* Clock Generation and Control SFR 8051 PROCESSOR RA
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Chapter 3 Pin Table 3.1 128-Pin Package Table 3.1 USB2250/50i/51/51i 128-Pin VTQFP Package COMPACTFLASH INTERFACE (28 PINS) CF_D0/GPIO16 CF_D1/GPIO17 CF_D2/GPIO18 CF_D3/GPIO19 CF_D4/GPIO20 CF_D5/GPIO21 CF_D6/GPIO22 CF_D7/GPIO23 CF_D8/GPIO24 CF_D9/GPIO25 CF_D10/GPIO26 CF_D11/GPIO27 CF_D12/GPIO28 CF_D13/GPIO29 CF_D14/GPIO30 CF_D15/GPIO31 CF_nIOR CF_nIOW CF_IRQ CF_nRESET CF_IORDY CF_nCS0 CF_DMACK/TXD/GPIO7 CF_SA0 CF_SA1 CF_SA2 GPIO13
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Table 3.1 USB2250/50i/51/51i 128-Pin VTQFP Package (continued) MEMORY/IO INTERFACE (28 PINS) MA0/CLK_SEL0 MA1/CLK_SEL1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13 MA14 MA15 MA16 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 nMRD nMWR nMCE MISC (10 PINS) nRESET GPIO3 (VBUS_DET) GPIO4 (SCL/xD_ID) GPIO5 (SDA) LED1 / GPIO1 GPIO8/CARD_PWR0 GPIO9/CARD_PWR1 GPIO10/CARD_PWR2 GPIO11/CARD_PWR3 TEST DIGITAL, POWER (14 PINS) (5) VDD33 (1) VDD18 (8)
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Chapter 4 Pin Configuration MS_D6 97 64 nRESET 98 63 GPIO12 (MS_INS) CF_D5 / GPIO21 99 62 MS_D3 CF_D12 / GPIO28 100 61 MS_D7 CF_D4 / GPIO20 101 60 MS_SCLK CF_D11 / GPIO27 VSS 102 59 CF_D3 / GPIO19 103 58 TEST GPIO13 (CF_nCD) VDD33 104 57 GPIO14 (SM_nCD) 105 56 GPIO6 (SD_WP) SM_nB/R MA7 106 55 SM_nRE 107 54 MA13 SM_nCE 108 53 MA6 SM_CLE SMSC MA8 109 52 SM_ALE 110 51 MA5 VSS MA9 111 50 VDD33 112 49 MA4 VDD18 USB225X MA11 113 48 SM_nWE
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Chapter 5 Pin Descriptions This section provides a detailed description of each signal. The signals are arranged in functional groups according to their associated interface. The “n” symbol in the signal name indicates that the active, or asserted, state occurs when the signal is at a low voltage level. When “n” is not present before the signal name, the signal is asserted at the high voltage level. The terms assertion and negation a
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Table 5.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued) 128-PIN BUFFER NAME SYMBOL VTQFP TYPE DESCRIPTION CF Data 7-0 / CF_D[7:0] / 69 I/O12PD CF_D[7:0]: The bi-directional data signals GPIO CF_D7 - CF_D0 in True IDE mode data GPIO[23:16] 67 transfer. In True IDE Mode, all of the task file 63 register operations occur on the CF_D[7:0], 61 while data transfer occurs on CF_D[15:0]. 59 88 The bi-directional data s
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Table 5.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued) 128-PIN BUFFER NAME SYMBOL VTQFP TYPE DESCRIPTION SM Address SM_ALE 52 O12PD This pin is an active high Address Latch Strobe Enable signal for the SM device. This pin has a weak pull-down resistor that is permanently enabled. SM Command SM_CLE 53 O12PD This pin is an active high Command Latch Strobe Enable signal for the SM device. This pin has a weak pull-
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Table 5.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued) 128-PIN BUFFER NAME SYMBOL VTQFP TYPE DESCRIPTION SM Busy or Data SM_nB/R 56 IPU This pin is connected to the BSY/RDY pin of Ready the SM device. When using the internal FET, this pin has an internal weak pull-up resistor that is tied to the output of the internal Power FET, and is controlled by the SM_PU bit of the SMC_CTL register. If an external FET
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Table 5.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued) 128-PIN BUFFER NAME SYMBOL VTQFP TYPE DESCRIPTION MS System Data MS_D0 / 94 I/O12PD MS_D0: This pin is one of the bi-directional In/Out MS_SDIO data signals for the MS device. In serial mode, the most significant bit (MSB) of each byte is transmitted first by either MSC or the MS device on MS_D0, MS_D0, MS_D2, and MS_D3 (which have weak pull-down resist
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Table 5.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued) 128-PIN BUFFER NAME SYMBOL VTQFP TYPE DESCRIPTION Crystal XTAL1 124 ICLKx 24MHz Crystal or external clock input. Input/External (CLKIN) XTAL: This pin can be connected to one Clock Input terminal of the crystal or it can be connected to an external 24/48MHz clock when a crystal is not used. Note: The MA[1:0] pins will be sampled while nRESET is asserted,
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Table 5.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued) 128-PIN BUFFER NAME SYMBOL VTQFP TYPE DESCRIPTION Memory Address MA1[1:0] / 25 O12 MA[1:0]: These signals address memory locations within the external memory. Bus CLK_ 27 SEL1[1:0] I/O12PD CLK_SEL[1:0]: During nRESET assertion, these pins will select the operating frequency of the external clock, and the corresponding weak pull-down resistors are enabled.
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Table 5.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued) 128-PIN BUFFER NAME SYMBOL VTQFP TYPE DESCRIPTION General Purpose GPIO4 118 I/O12 GPIO: This pin may be used either as input, I/O (SCL/xD_ID) edge sensitive interrupt input, or output. O12 SCL: This is the clock output when used with an external EEPROM. I/O12 xD_ID: This is the xD card detection pin only applicable to the USB2250/USB2250i. General Purpose G
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet Table 5.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued) 128-PIN BUFFER NAME SYMBOL VTQFP TYPE DESCRIPTION DIGITAL POWER, and GROUND 1.8V Digital Core VDD18 49 All VDD18 pins must be connected together Power on the circuit board. +1.8V Core power. If the internal regulator is enabled, then this pin must have a 1.0μF (or greater) ±20% (ESR <0.1Ω) capacitor to VSS. 3.3V Power & VDD33 15 3.3V Power & Voltage Regula
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet 5.2 Buffer Type Descriptions Table 5.2 USB2250/50i/51/51i Buffer Type Descriptions BUFFER DESCRIPTION I Input. IPU Input with internal weak pull-up resistor. IPD Input with internal weak pull-down resistor. IS Input with Schmitt trigger. I/O12 Input/Output buffer with 12mA sink and 12mA source. I/O200 Input/Output buffer 12mA with FET disabled, 100/200mA source only when the FET is enabled. I/O12PD Input/Output buffer with 12mA si
