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DLP-
DLP-
USB245R
USB245R
LEAD-FREE
USB-PARALLEL FIFO Module
USB-PARALLEL FIFO Module
The DLP-USB245R is DLP Design’s smallest USB-to-parallel FIFO interface module and
utilizes the popular FT245R IC with FTDIChip-ID™ feature from FTDI. In addition to enabling
standard USB-to-FIFO designs, both asynchronous and synchronous bit-bang interface modes
are also available.
The DLP-USB245R is available in a lead-free, RoHS-compliant, compact 18-pin, 0.1-inch
standard DIP footprint.
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APPLICATION AREAS: • Upgrading legacy peripherals to USB • Interfacing MCU/PLD/FPGA-based designs to USB • USB audio and low-bandwidth video data transfer • PDA-to-USB data transfer • USB smart card readers • USB instrumentation • USB industrial control • USB MP3 player interface • USB FLASH card readers and writers • Set top box PC-USB interface • USB hardware modems • USB wireless modems • USB bar code readers • USB software and hardware encryption dongles DRIVER SUPPORT
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ABSOLUTE MAXIMUM RATINGS • Storage Temperature -65°C to +150°C • Ambient Temperature (Power Applied) -40 to +85°C • VCC Supply Voltage -0.5V to +6.00V • DC Input Voltage: Inputs -0.5V to VCC + 0.5V • DC Input Voltage: High-Impedance Bidirectionals -0.5V to VCC + 0.5V • DC Output Current: Outputs 24mA D.C. CHARACTERISTICS (AMBIENT TEMPERATURE: -40 TO 85°C) • VCC Operating-Supply Voltage 4.0 - 5.25V • VCCIO Operating-Supply Voltage 4.0 - 5.25V • Op
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2.0 TIMING DIAGRAMS T6 T5 RXF# T1 T2 RD# T3 T4 D[7..0] Valid data D Description Min Max Unit TIME DESCRIPTION MIN MAX UNIT TIME DESCRIPTION MIN MAX UNIT T1 RD# Active Pulse Width 50 - nS T2 RD# to RD# Pre-Charge Time 50 + T6 - nS RD# Active to Valid Data* T3 20 50 nS
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3.0 APPLICATION NOTES USB devices transfer data in packets. If data is to be sent from the PC, a packet is built up by the application program and is sent via the device driver to the USB scheduler. This scheduler adds a request to the list of tasks that the USB host controller will perform. This will typically take at least 1 millisecond to execute because it will not pick up the new request until the next USB frame (the frame period is 1 millisecond). There is, therefore, sizeable
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5.0 EEPROM WRITE UTILITY The DLP-USB245R has the option to accept manufacturer-specific information that is written into EEPROM memory. Parameters that can be programmed include the VID and the PID identifiers, the manufacturer's product string and a serial number. MPROG is the latest EEPROM programming utility for the FT245R device. You must install the latest release of the CDM drivers in order to run this application. If you have CDM drivers installed on the PC that is to perfor
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PIN # DESCRIPTION PIN # DESCRIPTION 1 GROUND 2 DB2 - FIFO Data Bus Bit 2 DB7 - FIFO Data Bus Bit 7 3 4 DB5 - FIFO Data Bus Bit 5 5 DB3 - FIFO Data Bus Bit 3 PWREN# - Goes low after the module is configured by USB, then high during USB Suspend. This output can be used to control an external P-channel, logic-level MOSFET 6 switch. Enable the interface pull-down option when using the PWREN# pin in this way. PWREN# should be pulled to VCCIO with 10k-Ohm resistor. VCCIO - +1.8V to +5
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8.0 DEVICE CONFIGURATION EXAMPLES USB Bus-Powered and Self-Powered Configurations Figure 1. 7 8 9 Bus-Powered 5V System The figure above illustrates a typical USB bus-powered configuration. A USB bus-powered device gets its power from the USB bus. Basic rules for USB bus-powered devices are as follows: 1. On plug-in to USB, the module and external circuitry should draw no more than 100mA on the 5-volt line from the USB host. 2. In USB Suspend Mode, the
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Figure 2. 5.0V 7 8 9 Self-Powered 5V System Figure 2 illustrates a typical USB self-powered configuration. A USB self-powered device gets its power from its own power supply and does not draw current from the USB bus. Basic rules for USB self-powered devices are as follows: 1. A self-powered device should not force current down the USB bus when the USB host or hub controller is powered down. 2. A self-powered device can take as much current as it likes during no
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9.0 BUS-POWERED CIRCUIT WITH POWER CONTROL USB bus-powered circuits need to be able to power down in USB Suspend Mode in order to meet the <= 2.5mA total Suspend current requirement (including external logic): P-Channel Power MOSFET Figure 4. S D G .1uF 10K 1K Microcontroller VCC PWREN# 7 8 9 Power Controlled by PWREN# Figure 4 shows how to use a discrete P-Channel MOSFET to control the power to external logic circuits. This “soft-start” circuit accomm
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10.0 MECHANICAL DRAWINGS (PRELIMINARY) INCHES (MILLIMETERS) UNLESS OTHERWISE NOTED 0.22 typ (5.6 typ) 0.21 typ (5.3 typ) Side View 0.23 typ (5.8 typ) 0.37 typ (9.4 typ) 0.43 typ (10.9 typ) 0.09 typ (2.3 typ) 0.60 typ (15.2 typ) 1.26 typ (32.1 typ) 11.0 DISCLAIMER © DLP Design, Inc., 2008 Neither the whole nor any part of the information contained herein nor the product described in this manual may be adapted or reproduced in
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This document provides preliminary information that may be subject to change without notice. 12.0 CONTACT INFORMATION DLP Design, Inc. 1605 Roma Lane Allen, TX 75013 Phone: 469-964-8027 Fax: 415-901-4859 Email Sales: sales@dlpdesign.com Email Support: support@dlpdesign.com Website URL: http://www.dlpdesign.com Rev. 1.0 (November 2008) 12 © DLP Design, Inc.
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5 4 3 2 1 D D FB1 240-1018-1 C3 .1uF 1 2 EXTVCC VCCIO C C C2 C1 PORTVCC .01 10/10 Tant U1 FT245RL 20 VCC5 IN 1 1 DB0 D0 CN1 2 16 5 DB1 USBDM D1 USB B Conn 3 15 3 DB2 USBDP D2 4 11 1 18 DB3 DB0 D3 5 2 2 17 DB4 DB2 DB4 D4 C6 C7 9 3 16 D5 DB5 DB7 DB1 47pF 47pF 8 10 4 15 VCCIN/NC D6 DB6 DB5 RXF# 19 6 5 14 RESET# D7 DB7 DB3 TXE# C4 24 6 13 AVCC/NC PWREN DB6 .47uF 27 23 7 12 RXF# VCCIO WR OSCI RXF# 28 22 8 11 TXE# EXTVCC RD# OSCO TXE# 13 9 10 RD# PORTVCC RD# 14 WR B WR B 17 12 PWREN 3V3OUT PWREN J1 C5
