Streszczenie treści zawartej na stronie nr. 1
MSM80C154S
MSM83C154S
MSM85C154HVS
USER'S MANUAL
Streszczenie treści zawartej na stronie nr. 2
Copyright 1988, OKI ELECTRIC INDUSTRY COMPANY, LTD. OKI makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in this document nor does it make a commitment to update the information contained herein. OKI retains the right to make changes to these specifications at any time, without notice.
Streszczenie treści zawartej na stronie nr. 3
CONTENTS 1. INTRODUCTION 1.1 MSM80C154S/MSM83C154S/MSM85C154HVS Outline ..................................3 1.2 MSM80C154S/MSM83C154S Features .............................................................5 1.3 Additional Features in MSM80C154S/MSM83C154S/MSM85C154HVS ...........7 2. SYSTEM CONFIGURATION 2.1 MSM80C154S/MSM83C154S/MSM85C154HVS Logic Symbols ....................11 2.2 MSM80C154S/MSM83C154S Pin Layout ........................................................12 2.2.1 MSM80C154S/MSM83C
Streszczenie treści zawartej na stronie nr. 4
3. CONTROL 3.1 Oscillators [XTAL1 .2] .......................................................................................43 3.2 CPU Resetting ..................................................................................................45 3.2.1 Outline .......................................................................................................45 3.2.2 Reset Schmitt trigger circuit .......................................................................50 3.2.3 CPU internal stat
Streszczenie treści zawartej na stronie nr. 5
4.5.2.5.7 Caution about use of timer counters 0 and 1 ..................................90 4.5.2.5.8 Caution about use of timer counters 0 and 1 when setting software power down mode...........................................................................91 4.5.3 Timer/counter 2 .........................................................................................92 4.5.3.1 Outline ...................................................................................................92 4.5.3.2
Streszczenie treści zawartej na stronie nr. 6
4.6.4.2 Multi-processor systems ......................................................................128 4.7 Interrupt.............................................................................................................129 4.7.1 Outline .....................................................................................................129 4.7.2 Interrupt enable register (IE)....................................................................131 4.7.3 Interrupt priority register (IP)...
Streszczenie treści zawartej na stronie nr. 7
5.7 High Impedance Input Port Setting of Each Quasi-bidirectional Port 1, 2, and 3 ...............................................................................................207 5.8 100 kW Pull-Up Resistance Setting for Quasi-bidirectional Input Ports 1, 2, and 3 .............................................................................................207 5.9 Precautions When Driving External Transistors by Quasi-bidirectional Port Output Signals...........................................
Streszczenie treści zawartej na stronie nr. 8
1. INTRODUCTION
Streszczenie treści zawartej na stronie nr. 9
MSM80C154S/83C154S/85C154HVS 2
Streszczenie treści zawartej na stronie nr. 10
INTRODUCTION 1. INTRODUCTION 1.1 MSM80C154S/MSM83C154S/MSM85C154HVS Outline MSM80C154S/MSM83C154S/MSM85C154HVS are single-chip 8-bit fully static microcon- trollers featuring high performance and low power consumption. All MSM80C31F /MSM80C51F instructions and functions have been retained. Apart from being without the internal program memory (ROM), MSM80C154S is identical to MSM83C154S. And the difference between MSM85C154HVS and MSM83C154S is that the internal program memory (ROM) in MSM83C154
Streszczenie treści zawartej na stronie nr. 11
MSM80C154S/83C154S/85C154HVS execution from the next address after the stop address where CPU power down mode was activated. Each of the quasi-bidirectional ports 1, 2, and 3 can be set independently as high impedance input ports. And the 10 kW pull-up resistance for these input ports can be isolated from the power supply (VCC), leaving only the 100 kW pull-up resistance and thereby enabling the quasi-bidirectional ports to be driven by devices with low drive capacity. Furthermore, the outputs o
Streszczenie treści zawartej na stronie nr. 12
INTRODUCTION 1.2 MSM80C154S/MSM83C154S Features • Full static circuitry • Internal program memory (ROM) 16384 words · 8 bits (MSM83C154S) • External program memory (ROM) Connectable up to 64K bytes • Internal data memory (RAM) 256 words · 8 bits • External data memory (RAM) Connectable up to 64K bytes • Four sets of working registers (R0 thru R7 · 4) • Stack Free use of 256-word · 8-bit internal data memory area • Four input/output ports (8-bit · 4) • Serial ports (UART operation) • Six types of
Streszczenie treści zawartej na stronie nr. 13
MSM80C154S/83C154S/85C154HVS • Timer/counters (three 16-bit timer/counters) (1) 8-bit timer with 5-bit prescalar (2) 16-bit timer (3) 8-bit timer with 8-bit auto-reloader (4) 8-bit separate timer (5) 16-bit timer with 16-bit auto-reloader (6) 16-bit capture timer (7) 16-bit baud rate generator timer (8) 32-bit timer • Wide operating temperature range –40 to +85 C • Wide operating voltage range (1) When operating: VCC=+2.2 to 6V (varies according to frequency) (2) When stopped: VCC=+2 to +6V (PD
Streszczenie treści zawartej na stronie nr. 14
INTRODUCTION 1.3 Additional Features in MSM80C154S/MSM83C154S/MSM85C154HVS In addition to the basic operations of MSM80C31F/MSM80C51F, the MSM80C154S/ MSM83C154S/MSM85C154HVS devices also include the following functions. • ROM capacity increased from 4K bytes to 16K bytes • RAM capacity increased from 128 bytes to 256 bytes • An additional timer counter 2 • An additional timer interrupt 2 • An additional 8-bit timer 2 control register (T2CON 0C8H) • An additional 8-bit I/O control register (IOCO
Streszczenie treści zawartej na stronie nr. 15
MSM80C154S/83C154S/85C154HVS 8
Streszczenie treści zawartej na stronie nr. 16
2. SYSTEM CONFIGURATION
Streszczenie treści zawartej na stronie nr. 17
MSM80C154S/83C154S/85C154HVS 10
Streszczenie treści zawartej na stronie nr. 18
SYSTEM CONFIGURATION 2. SYSTEM CONFIGURATION 2.1 MSM80C154S/MSM83C154S/MSM85C154HVS Logic Symbols XTAL1 P0.0 P0.1 P0.2 P0.3 PORT 0 (BUS PORT) XTAL2 P0.4 P0.5 P0.6 P0.7 RESET RESET P1.0 T2 P1.1 T2EX P1.2 P1.3 PORT 1 P1.4 ADDRESS LATCH ALE P1.5 ENABLE P1.6 PROGRAM STORE PSEN P1.7 ENABLE P2.0 P2.1 CPU MEMORY EA P2.2 SEPARATE P2.3 PORT 2 P2.4 P2.5 +5(V) VCC P2.6 P2.7 P3.0 RXD 0(V) VSS P3.1 TXD P3.2 INT0 P3.3 INT1 PORT 3 P3.4 T0 P3.5 T1/HPDI P3.6 WR P3.7 RD Figure 2-1 MSM80C154S/83C154S/85C154HVS lo
Streszczenie treści zawartej na stronie nr. 19
MSM80C154SGS/ MSM80C154SRS/MSM83C154SRS MSM83C154SGS MSM80C154S/83C154S/85C154HVS 2.2 MSM80C154S/MSM83C154S pin layouts MSM80C154SRS/MSM83C154SRS (Top View) 40 Pin Plastic DIP P1.0/T2 1 40 VCC P1.1/T2EX 2 39 P0.0 P1.2 3 38 P0.1 P1.3 4 37 P0.2 P1.4 5 36 P0.3 P1.5 6 35 P0.4 P1.6 7 34 P0.5 P1.7 8 33 P0.6 RESET 9 32 P0.7 P3.0/RXD 10 31 EA P3.1/TXD 11 30 ALE P3.2/INT0 12 29 PSEN P3.3/INT1 13 28 P2.7 P3.4/T0 14 27 P2.6 P3.5/T1/HPDI 15 26 P2.5 P3.6/WR 16 25 P2.4 P3.7/RD 17 24 P2.3 XTAL2 18 23 P2.2 XTA
Streszczenie treści zawartej na stronie nr. 20
MSM80C154STS/ MSM83C154STS MSM80C154SJS/MSM83C154SJS SYSTEM CONFIGURATION MSM80C154SJS/MSM83C154SJS (Top View) 44 Pin Plastic QFJ 654321 44 43 42 41 40 P1.5 7 39 P0.4 P1.6 8 38 P0.5 P1.7 9 37 P0.6 RESET 10 36 P0.7 P3.0/RXD 11 35 EA NC 12 34 NC P3.1/TXD 13 33 ALE P3.2/INT0 14 32 PSEN P3.3/INT1 15 31 P2.7 P3.4/T0 16 30 P2.6 P3.5/T1/HPDI 17 29 P2.5 18 19 20 21 22 23 24 25 26 27 28 MSM80C154STS/MSM83C154STS (Top View) 44 Pin Plastic Package 44 43 42 41 40 39 38 37 36 35 34 P1.5 1 33 P0.4 P1.6 2 32
