Streszczenie treści zawartej na stronie nr. 1
Frequency Generator
for
Spartan-3E Starter Kit
Ken Chapman
Xilinx Ltd
th
18 July 2006
With special thanks to
Peter Alfke and Alireza Kaviani.
Rev.1
Streszczenie treści zawartej na stronie nr. 2
Limitations Limited Warranty and Disclaimer. These designs are provided to you “as is”. Xilinx and its licensors make and you receive no warranties or conditions, express, implied, statutory or otherwise, and Xilinx specifically disclaims any implied warranties of merchantability, non-infringement, or fitness for a particular purpose. Xilinx does not warrant that the functions contained in these designs will meet your requirements, or that the operation of these designs will be uninterrupted
Streszczenie treści zawartej na stronie nr. 3
Design Overview This design converts the Spartan-3E Starter Kit into a reasonably accurate frequency generator covering the nominal range 1Hz to 100MHz. The design allows you to attempt generation of higher frequencies to allow you to experiment with the maximum performance of the Spartan device on your board. The rotary control is used to edit the frequency displayed on the upper line of the LCD display and the corresponding frequency will then be output on the SMA connector (J17) as well as
Streszczenie treści zawartej na stronie nr. 4
Operating Instructions Output frequency provided on SMA connector (J17) and J4_IO12. LEDs indicate the editing mode. = Edit cursor position mode = Edit digit value mode The cursor is the small The cursor can be moved into the black line under the digit Press and release knob to toggle between frequency editing modes 10MHz and 100MHz digit positions but in the top line. these positions are blanked when zero. Edit cursor position mode In this mode rotating the knob to the left or right will c
Streszczenie treści zawartej na stronie nr. 5
PicoBlaze Design Size The images and statistics on this page show that the design occupies just 172 slices, 1 BRAM and 2 DCMs. This is only 3.7% of the slices available in an XC3S500E device. More significantly, this slice count can be reduced to less than 32 when implementing a fixed frequency version. PicoBlaze makes extensive use of the distributed memory features of the MAP report Number of occupied Slices: 172 out of 4,656 3% Spartan-3E device leading to very high design efficien
Streszczenie treści zawartej na stronie nr. 6
Design Files The source files provided for the reference design are….. Top level file and main description of hardware. Contains I/O required to disable StrataFLASH memory device on the board which may frequency_generator.vhd otherwise interfere with the LCD display. I/O constraints file for Spartan-3E Starter Kit frequency_generator.ucf Timing specifications for 50MHz PicoBlaze controller 200MHz DDS circuits. Location constraint for DCM used for Jitter reduction. kcpsm3.vhd PicoBlaze processo
Streszczenie treści zawartej na stronie nr. 7
Direct Digital Synthesis (DDS) Circuit Diagram io12 The phase accumulator is a standard 32-bit accumulator operating at 200MHz. This accumulator is 31 really the heart of the DDS as it is the most significant bit of the accumulator that produces the 30 variable frequency being synthesized. The remaining circuits only multiply, divide and clean this 29 sma_out synthesized frequency or are involved with selecting and generating the DDS control words. The frequency of the most significant bit is
Streszczenie treści zawartej na stronie nr. 8
led(7) led(6) PicoBlaze Circuit Diagram led(5) led(4) PicoBlaze provides the user interface and performs led(3) output_ports the calculations required to generate the 32-bit DDS ‘JTAG_loader’ allows rapid led(2) control word ‘N’ and 5-bit DDS scaling word ‘D’. PicoBlaze code development. led(1) led(0) program_rom 7 Hint – The ‘fg_ctrl.psm’ file contains significant comments to explain the operations and calculations fg_ctrl that the PicoBlaze program is performing to JTAG proc_reset bidire
Streszczenie treści zawartej na stronie nr. 9
Phase Accumulator Waveforms The following waveforms were obtained by monitoring the output of the phase accumulator presented on stake pin ‘J4-IO9’. In each case the digital storage oscilloscope was set to infinite persistence in order capture any fluctuations over time and therefore observe the ‘envelope’ of operation. This waveform shows a pretty clean 12.5MHz square wave. The reason the waveform is so clean is because 12.5MHz is a perfect division of the 200MHz clock used by the phase accu
Streszczenie treści zawartej na stronie nr. 10
Phase Accumulator Spectrum An alternative way to observe the quality of the waveforms synthesised by the phase accumulator is to look at the frequency spectrum. I was lucky enough to have a 2048-point FFT feature on my oscilloscope which allows some simple observations to be made. Once again I have set the display to infinite persistence in order capture the spectrum over a long period of time (>15 seconds). I suggest that you do not look for exact values, but compare the plots which have bee
Streszczenie treści zawartej na stronie nr. 11
Final Output Waveforms These waveforms were obtained from stake pin ‘J4-IO12’ and reflect the final output of the frequency generator. Once again the digital storage oscilloscope was set to infinite persistence in order capture any fluctuations over time and therefore observe the ‘envelope’ of operation. In these cases the frequency shown on the LCD display directly corresponds to the frequency provided at the output. However it is useful to understand what the phase accumulator is generating
Streszczenie treści zawartej na stronie nr. 12
Final Output Spectrum Observing the frequency spectrum of the final output reveals that you can not get something for nothing and helps us to understand when the frequency aligned mode should and should not be used. I have used the infinite persistence display again and this time it was even more useful to do so. As before, plots on the left cover up to up to 50MHz and on plots on the right show ±5MHz centred on 12.5MHz. These plots show that the 12.5MHz signal is rd 3 actually not as good as
Streszczenie treści zawartej na stronie nr. 13
Setting DCM Frequency Aligned Mode To set the DCM into the frequency aligned mode of operation a special option must be used during configuration file generation. This can be set in the ISE tools as shown in these screen shots from an ISE v8.1i project for this reference design. 1) In the ‘Processes’ window select ‘Generate Programming File’. Then right click and select ‘Properties’ to open the ‘Process Properties’ box. 2) The ‘Process Properties’ box should open with the ‘General Options’ bei
Streszczenie treści zawartej na stronie nr. 14
Exercises, Experiments and Suggestions Here are some exercises, experiments and suggestions for you to consider based on this reference design. Although several are specific to the Spartan- 3E Starter Kit, most are portable to your own boards and designs where I hope you will find the design concept useful. Turn it off! Probably the best way to convince yourself that the frequency aligned mode of the DCM is really doing something special is to turn it off (remove the special BITGEN option) and
