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AVR1909: Display Xplained Hardware User's
Guide
Features
• 240 x 320 (QVGA) graphical TFT display
8-bit
- With resistive touch
- LED Backlight
Microcontrollers
- Internal controller
• Simple SPI interface for control
• Digital (PWM) control interface for backlight
• One 40pin, 0.5mm FPC connector
Application Note
• Display and backlight powered by single 3.3V
1 Introduction
The Display Xplained module gives the possibility to evaluate a 240 x 320 pixel
(QVGA) gr
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2 Related Items Datasheet for the LCD module (ET024006DHU) from EDT can be found here: http://www.farnell.com/datasheets/86386.pdf Datasheet for the graphical controller (HX8347-A) from Himax can be obtained by contacting EDT. It may also found on the web. Firmware for Xplain kit can be found here: http://www.atmel.com/Xplain Also checkout these application note: • AVR1913: Display Xplained Firmware – Getting Started training • AVR1921: Reprogramming the Xplain AT90USB1287 and A
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AVR1909 The Display Xplained module is quite simple. It basically connects the TFT display SPI interface, resistive touch interface, and backlight interface from a 40pin FPC connector to two female pin-headers that fit the Xplain kit. In addition it has a program/debug interface that will connect an external programmer/debugger to the Xplain kit through a male and a female pin-header. 3.1 The LCD Module The LCD module is produced by EDT (Emerging Display Technologies Corp), and is cal
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3.4 The SPI interface The Display Xplained module uses a simple SPI interface to communicate with the LCD module. This consist of a Chip-Select (CS) line, a clock line (SCL), and two data lines (SDI/SDO). The SPI is operated in mode 3, i.e. inactive clock is ‘high’, and data is latched on rising clock edge. 3.5 The SPI/USART MUX resistors The ATxmega128A1 has swapped the MOSI and SCK signals between using the regular SPI and using the USART in master SPI mode, which is available on the
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AVR1909 directly to the header. If it is desired to use PDI programming/debugging an adapter or squid cable (included in the JTAGICE mkII kit) must be used. Please see Table 4-1 below for pin-out description. Table 4-1. Programming headers (J103/J104) – JTAG and PDI. (1) (2) J103/J104 pin JTAG PDI J103/J104-1 TCK - (3) J103/J104-2 GND GND J103/J104-3 TDO - (3) J103/J104-4 V3P3 V3P3 J103/J104-5 TMS - J103/J104-6 nSRST PDI_CLK (3) J103/J104-7 V3P3 V3P3 J103/J104-8 - PDI_DATA J103/
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4.3 The SPI/TE/Reset/backlight pin-header (J102) This connector connects to the display’s SPI interface and backlight to the AVR XMEGA’s digital PORTD that is available on the “AVR XMEGA PORT D” pin header on the Xplain board(J102). Please see Table 4-3 page below for pin-out description. Table 4-3. The SPI/TE/Reset/backlight pin-header (J102) J102 pin LCD SPI interface signals + backlight J102-1 TFT_BL_PWM J102-2 TFT_RESET J102-3 TFT_TE (Tear-Enable signal to synchronize write) J102-
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Disclaimer Headquarters International Atmel Corporation Atmel Asia Atmel Europe Atmel Japan 2325 Orchard Parkway Unit 1-5 & 16, 19/F Le Krebs 9F, Tonetsu Shinkawa Bldg. San Jose, CA 95131 BEA Tower, Millennium City 5 8, Rue Jean-Pierre Timbaud 1-24-8 Shinkawa USA 418 Kwun Tong Road BP 309 Chuo-ku, Tokyo 104-0033 Tel: 1(408) 441-0311 Kwun Tong, Kowloon 78054 Saint-Quentin-en- Japan Fax: 1(408) 487-2600 Hong Kong Yvelines Cedex Tel: (81) 3-3523-3551 Tel: (852) 2245-6100 France Fax
