Instrukcja obsługi Yamaha dx7/9

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DX7 CIRCUIT DESCRIPTION 1. Keyboard and Panel Switch Scanning The 4 bits BO ~ B3 from the sub-CPU (6805S) are input to the decoder (40H138). The decoder output is sent to the keyboard transfer contacts and the panel switches. The on or off state of the keyboard break contacts, make contacts and panel switches are sent to the sub-CPU AO ~ A7 lines via a line driver (40H240) when the sub-CPU B4 and B5 lines are low. 2. Key ON/OFF and Touch Data The time it takes for the transfer contact to connec

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4-6. Data is not accepted from the panel switches and keys while the sub-CPU C2 line is low. 5. Main CPU Operation The main CPU mode is set by externally initializing lines P20~P22. When “L, L, H” is applied to the P20~P22 lines and latched into the CPU on the rising edge of RES, the Extended Multiplex Mode is selected. In this mode, P40 ~ P47 function as address lines. The lower address bits are multiplexed with the data on lines P30 ~ P37, and are separated by the address strobe signal SCI. P2

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9. LCD Data from the main CPU is decoded and displayed at the LCD unit. 10. EGS (Envelope Generator) 8 bits of data are received from the main CPU, and envelope and frequency data are sent to OPS. 11. OPS (Operator) The OPS uses a sine table to generate waveform data to be sent to the DAC from the received envelope and frequency data. The OPS permits combining the 6 operators in 32 different combinations. The combina- tions are called “algorithms”. One of the 6 operators is able to feed the sine

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it takes until Ll is reached from L4. The larger the Rl value, the sharper the attack. Rates and levels determine the basic shape of the envelope, but the actual envelope shape is affected by output level and key scaling. 3. Output Level Buffer Output level buffer receives data concerning key scaling, after touch, and output level from the CPU. Actual values used for Ll to L4 are determined by the data stored in this buffer. Key scaling changes the output level as shown below.

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4. Frequency Buffer Frequency data related to key code, pitch envelope, and transposition is received from the CPU and stored in the frequency buffer. 5. Rate Scaling Buffer Data used to determine rate values according to key scaling is stored in the rate scaling buffer. 6. Values used for Rl to R4 are determined by the data stored in the frequency and rate scaling buffers. 7. Key Event Buffer Key states (ON/OFF) are stored in the key event buffer. 8. Modulation Sensitivity Buffer Amplitude modu

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