Summary of the content on the page No. 1
REJ10J1564-0104
SH7285 CPU Board
M3A-HS85
32
User's Manual
Renesas 32-Bit RISC Microcomputers
TM
SuperH RISCengine Family / SH7285 Group
Rev. 1.04
Issued: Jul 15, 2008
Summary of the content on the page No. 2
Notes regarding these materials 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this do
Summary of the content on the page No. 3
Table of Contents Chapter1 Overview ..............................................................................................................................1-1 1.1 Overview .................................................................................................................................................................... 1-2 1.2 Configuration................................................................................................................................
Summary of the content on the page No. 4
3.2.4 Serial Port Select Jumper (JP7, JP8).............................................................................................................. 3-22 3.2.5 Switch and LED Functions .............................................................................................................................. 3-23 3.2.6 Jumper Switch Setting when Using Development Tool................................................................................... 3-25 3.3 Board Dimensions of M3A
Summary of the content on the page No. 5
Chapter1Overview Chapter1 Overview 1-1
Summary of the content on the page No. 6
Overview 1 1.1 Overview 1.1 Overview The M3A-HS85 is the CPU board designed for users to evaluate the functionality and performance of the SH7285 group of Renesas Technology original microcomputer, as well as develop and evaluate the application software for this group of microcomputers. The Sh7285’s data bus, address bus and various internal peripheral circuit function pins are connected to the extension connector of the M3A-HS85, allowing users to evaluate the timing relationship w
Summary of the content on the page No. 7
Overview 1 1.3 External Specifications 1.3 External Specifications Table 1.3.1 lists the external specifications of M3A-HS85. Table 1.3.1 External Specifications of M3A-HS85 No. Item Content SH7285 Input(XIN) Clock: 12.5 MHz CPU Clock: Maximum 100 MHz 1 CPU Bus Clock: Maximum 50 MHz On-chip memory • Flash Memory: 768 KB • RAM: 32 KB SRAM: 2-Mbyte (16-bit bus width x 1 pc.) (Not mounted) *Can be mounted only when SH7285 is used in 3.3V. SDRAM: 16-Mbyte (16-bit bus width
Summary of the content on the page No. 8
Overview 1 1.4 External View 1.4 External View Figure 1.4.1 shows the external view of M3A-HS85. Figure 1.4.1 External View of M3A-HS85 Rev.1.04 2008.07.10 1-4 REJ10J1564-0104
Summary of the content on the page No. 9
Overview 1 1.5 M3A-HS85 Block Diagram 1.5 M3A-HS85 Block Diagram Figure 1.5.1 shows the system block diagram of M3A-HS85. H-UDI connector H-UDI connector Serial Port USB (36-pin) (14-pin) Connector Connector H-UDI AUD SCI0 USB USBXIN (48 MHz) I2C SH7285 EEPROM SDRAM SRAM (128 k-bit) (100 MHz) XIN 2 MB 16 MB (12.5 MHz) * * 16 16 16 External bus: Maximum 50 MHz 16 SH7285 CPU Board M3A-HS85 Extension Connectors : It is not mounted. * : It can be mounted only when SH7285 is used in 3.3V.
Summary of the content on the page No. 10
Overview 1 1.6 M3A-HS85 Board Overview 1.6 M3A-HS85 Board Overview Figure 1.6.1 shows the M3A-HS85 board overview. Figure 1.6.1 M3A-HS85 Board Overview Rev.1.04 2008.07.10 1-6 REJ10J1564-0104
Summary of the content on the page No. 11
Overview 1 1.6 M3A-HS85 Board Overview Table 1.6.1 lists the main components mounted on the M3A-HS85. Table 1.6.1 Main Components Mounted in the M3A-HS85 Recommended components Symbol Parts Name Remarks (Part number and manufacture) U1 CPU SH7285 (Renesas) U2 SRAM Not mounted R1LV1616RSA-7S (Renesas) U3 SDRAM Not mounted EDS1216AATA-75E (Elpida) U4 EEPROM Not mounted HN58X24128FPIE (Renesas) U5 RS-232C driver SP3232ECA(Sipex) M51957BFP U6 Reset IC (Renesas) Oscillator SG8002
Summary of the content on the page No. 12
Overview 1 1.7 M3A-HS85 Memory Mapping 1.7 M3A-HS85 Memory Mapping Figure 1.7.1, Figure 1.7.2, and Figure 1.7.3 show the memory mapping examples of SH7285 in the M3A-HS85. Logical space of the SH7285 MCU mode 3 M3A-HS85 Memory Mapping (Single Chip Mode) H'0000 0000 H'0000 0000 On-chip ROM(768KB) On-chip ROM(768KB) H'000B FFFF H'000B FFFF H'000C 0000 H'000C 0000 Reserved Reserved H'801F FFFF H'801F FFFF H'8020 0000 H'8020 0000 On-chip flash memory On-chip flash memory writing/verify spac
Summary of the content on the page No. 13
Overview 1 1.7 M3A-HS85 Memory Mapping Logical space of the SH7285 MCU mode 0, 1 (On-chip ROM disabled mode) M3A-HS85 Memory Mapping H'0000 0000 SRAM(2MB) *1 *2 *3 H'0000 0000 CS0 space User area *3 H'03FF FFFF H'03FF FFFF H'0400 0000 H'0400 0000 CS1 space User area H'07FF FFFF H'07FF FFFF SRAM(2MB) *1 *2 H'0800 0000 H'0800 0000 CS2 space H'0BFF FFFF User area H'0BFF FFFF H'0C00 0000 H'0C00 0000 SDRAM(16MB) *2 CS3 space H'0CFF FFFF User area H'0FFF FFFF H'1000 0000 H'1000 0000 CS4 space
Summary of the content on the page No. 14
Overview 1 1.7 M3A-HS85 Memory Mapping Logical space of the SH7285 MCU mode 2 M3A-HS85 Memory Mapping (On-chip ROM enabled mode) H'0000 0000 H'0000 0000 On-chip ROM(768KB) On-chip ROM(768KB) H'000B FFFF H'000B FFFF H'000C 0000 H'000C 0000 Reserved Reserved H'01FF FFFF H'01FF FFFF SRAM(2MB) *1 *2 H'0200 0000 H'0200 0000 CS0 space User area H'03FF FFFF H'03FF FFFF H'0400 0000 H'0400 0000 CS1 space User area H'07FF FFFF H'07FF FFFF SRAM(2MB) *1 *2 H'0800 0000 H'0800 0000 CS2 space User area
Summary of the content on the page No. 15
Overview 1 1.8 Absolute Maximum Ratings 1.8 Absolute Maximum Ratings Table 1.8.1 lists the absolute maximum rating of M3A-HS85. Table 1.8.1 Absolute Maximum Ratings of M3A-HS85 Symbol Parameter Rated Value Remarks 5V System Power Supply Voltage -0.3V to 6.0V Relative to VSS 5VCC System Power Supply Relative to VSS 3VCC 3.3V -0.3V to 4.6V Voltage Operating Ambient Temperature °C °C No dewdrops allowed. Topr 0 to 50 Use in corrosive gas environment prohibited. Storage A
Summary of the content on the page No. 16
Overview 1 1.8 Absolute Maximum Ratings *This is a blank page* Rev.1.04 2008.07.10 1-12 REJ10J1564-0104
Summary of the content on the page No. 17
Chapter2Functional Overview Chapter2 Functional Overview 2-1
Summary of the content on the page No. 18
Functional Overview 2 2.1 Functional Overview 2.1 Functional Overview The M3A-HS85 is the SH7285 CPU board that has the functions listed in Table 2.1.1. Table 2.1.1 lists the functional modules of M3A-HS85. Table 2.1.1 Functional Modules of M3A-HS85 Section Function Content 2.2 CPU SH7285 • Input(XIN) Clock: 12.5 MHz • CPU Clock: Maximum 100 MHz • Bus Clock: Maximum 50 MHz • On-Chip Memory - Flash Memory: 768 kBytes - RAM: 32 kBytes 2.3 Memory • SRAM : 2-Mbyte (16-bit bus w
Summary of the content on the page No. 19
Functional Overview 2 2.2 CPU 2.2 CPU The M3A-HS85 contains the 32-bit RISC microcomputer SH7285 that operates with a maximum 100MHz of CPU clock frequency. The SH7285 includes 768-Kbyte flash memory, and 32-Kbyte RAM, making it useful in a wide range of applications from data processing to equipment control. The M3A-HS85 can be operated with a maximum 100MHz of CPU clock frequency (external bus maximum 50 MHz) using a 12.5 MHz input clock. Figure 2.2.1 shows the SH7285 block diagram
Summary of the content on the page No. 20
Functional Overview 2 2.3 Memory 2.3 Memory 2.3.1 SH7285 On-Chip Memory The SH7285 includes a 768-Kbytes flash memory and 32-Kbytes RAM. 2.3.2 SRAM Two Mbytes of SRAM can be mounted on the M3A-HS85 (Not mounted). In the M3A-HS85 specification, 3.3V power is supplied to SRAM so that SH7285 should be used in 3.3V when SRAM is mounted (CPU power supply switch jumper (JP1) should be set to “2-3”). SRAM is controlled by the bus state controller built into SH7285. The address spaces
