Cypress STK15C88 user manual

User manual for the device Cypress STK15C88

Device: Cypress STK15C88
Category: Computer Hardware
Manufacturer: Cypress
Size: 0.48 MB
Added : 8/17/2014
Number of pages: 15
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Abstracts of contents
Summary of the content on the page No. 1

STK15C88
256 Kbit (32K x 8) PowerStore nvSRAM
Features Functional Description
■ 25 ns and 45 ns access times The Cypress STK15C88 is a 256Kb fast static RAM with a
nonvolatile element in each memory cell. The embedded
■ Pin compatible with industry standard SRAMs ™
nonvolatile elements incorporate QuantumTrap technology
producing the world’s most reliable nonvolatile memory. The
■ Automatic nonvolatile STORE on power loss
SRAM provides unlimited read and write cycles, while
■ Nonvolatile STORE u

Summary of the content on the page No. 2

STK15C88 Pin Configurations Figure 1. Pin Diagram - 28-Pin SOIC Table 1. Pin Definitions - 28-Pin SOIC Pin Name Alt IO Type Description A –A Input Address Inputs. Used to select one of the 32,768 bytes of the nvSRAM. 0 14 DQ -DQ Input or Bidirectional Data IO lines. Used as input or output lines depending on operation. 0 7 Output Input Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the WE W IO pins is wr

Summary of the content on the page No. 3

STK15C88 Device Operation Software STORE The STK15C88 is a versatile memory chip that provides several Data is transferred from the SRAM to the nonvolatile memory by modes of operation. The STK15C88 can operate as a standard a software address sequence. The STK15C88 software STORE 32K x 8 SRAM. It has a 32K x 8 nonvolatile element shadow to cycle is initiated by executing sequential CE controlled READ which the SRAM information can be copied, or from which the cycles from six specific address lo

Summary of the content on the page No. 4

STK15C88 Figure 3. Current Versus Cycle Time (READ) Hardware Protect The STK15C88 offers hardware protection against inadvertent STORE operation and SRAM WRITEs during low voltage conditions. When V

Summary of the content on the page No. 5

STK15C88 Table 2. Software STORE/RECALL Mode Selection A – A Mode IO Notes CE WE 13 0 [1, 2] L H 0x0E38 Read SRAM Output Data 0x31C7 Read SRAM Output Data 0x03E0 Read SRAM Output Data 0x3C1F Read SRAM Output Data 0x303F Read SRAM Output Data 0x0FC0 Nonvolatile STORE Output Data [1, 2] L H 0x0E38 Read SRAM Output Data 0x31C7 Read SRAM Output Data 0x03E0 Read SRAM Output Data 0x3C1F Read SRAM Output Data 0x303F Read SRAM Output Data 0x0C63 Nonvolatile RECALL Output Data Notes 1. The six consecut

Summary of the content on the page No. 6

STK15C88 Voltage on DQ ...................................–0.5V to Vcc + 0.5V Maximum Ratings 0-7 Power Dissipation ......................................................... 1.0W Exceeding maximum ratings may shorten the useful life of the DC output Current (1 output at a time, 1s duration) .... 15 mA device. These user guidelines are not tested. Operating Range Storage Temperature .................................–65 °C to +150 °C Range Ambient Temperature V Temperature under bias .............

Summary of the content on the page No. 7

STK15C88 Data Retention and Endurance Parameter Description Min Unit DATA Data Retention 100 Years R NV Nonvolatile STORE Operations 1,000 K C Capacitance [4] In the following table, the capacitance parameters are listed. Parameter Description Test Conditions Max Unit C Input Capacitance T = 25 °C, f = 1 MHz, 5pF IN A V = 0 to 3.0 V CC C Output Capacitance 7 pF OUT Thermal Resistance [4] In the following table, the thermal resistance parameters are listed. 28-SOIC 28-SOIC Parameter Description

Summary of the content on the page No. 8

STK15C88 AC Switching Characteristics SRAM Read Cycle Parameter 25 ns 45 ns Description Unit Cypress Alt Min Max Min Max Parameter t t Chip Enable Access Time 25 45 ns ACE ELQV [5] t t t Read Cycle Time 25 45 ns RC AVAV, ELEH [6] t t Address Access Time 25 45 ns AA AVQV t t Output Enable to Data Valid 10 20 ns DOE GLQV [6] t t Output Hold After Address Change 5 5 ns OHA AXQX [7] t t Chip Enable to Output Active 5 5 ns LZCE ELQX [7] t t Chip Disable to Output Inactive 10 15 ns HZCE EHQZ [7] t t

Summary of the content on the page No. 9

STK15C88 Table 3. SRAM Write Cycle Parameter 25 ns 45 ns Description Unit Cypress Alt Min Max Min Max Parameter t t Write Cycle Time 25 45 ns WC AVAV t t t Write Pulse Width 20 30 ns PWE WLWH, WLEH t t t Chip Enable To End of Write 20 30 ns SCE ELWH, ELEH t t t Data Setup to End of Write 10 15 ns SD DVWH, DVEH t t t Data Hold After End of Write 0 0 ns HD WHDX, EHDX t t t Address Setup to End of Write 20 30 ns AW AVWH, AVEH t t t Address Setup to Start of Write 0 0 ns SA AVWL, AVEL t t t Addres

Summary of the content on the page No. 10

STK15C88 AutoStore or Power Up RECALL STK15C88 Parameter Alt Description Unit Min Max [10] t t Power up RECALL Duration 550 μs HRECALL RESTORE [6] t t STORE Cycle Duration 10 ms STORE HLHZ V Low Voltage Reset Level 3.6 V RESET V Low Voltage Trigger Level 4.0 4.5 V SWITCH Switching Waveforms Figure 9. AutoStore/Power Up RECALL Notes 10. t starts from the time V rises above V . HRECALL CC SWITCH Document Number: 001-50593 Rev. ** Page 10 of 15 [+] Feedback

Summary of the content on the page No. 11

STK15C88 Software Controlled STORE/RECALL Cycle [11, 12] The software controlled STORE/RECALL cycle follows. 25 ns 45 ns Parameter Alt Description Unit Min Max Min Max t t STORE/RECALL Initiation Cycle Time 25 45 ns RC AVAV [11] t t Address Setup Time 0 0 ns SA AVEL [11] t t Clock Pulse Width 20 30 ns CW ELEH [7, 11] t t Address Hold Time 20 20 ns HACE ELAX RECALL Duration 20 20 μs t RECALL Switching Waveforms [12] Figure 10. CE Controlled Software STORE/RECALL Cycle t t RC RC ADDRESS # 1 AD

Summary of the content on the page No. 12

STK15C88 Part Numbering Nomenclature STK15C88 - N F 45 I TR Packaging Option: TR = Tape and Reel Blank = Tube Temperature Range: Blank - Commercial (0 to 70°C) I - Industrial (-40 to 85°C) Speed: 25 - 25 ns 45 - 45 ns Lead Finish F = 100% Sn (Matte Tin) Package: N = Plastic 28-pin 300 mil SOIC S = Plastic 28-pin 330 mil SOIC Ordering Information Speed Operating Ordering Code Package Diagram Package Type (ns) Range 25 STK15C88-NF25TR 51-85026 28-Pin SOIC (300 mil) Commercial STK15C88-NF25 51-850

Summary of the content on the page No. 13

STK15C88 Package Diagrams Figure 11. 28-Pin (300 mil) SOIC (51-85026) NOTE : PIN 1 ID 1. JEDEC STD REF MO-119 2. BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH,BUT DOES INCLUDE MOLD MISMATCH AND ARE MEASURED AT THE MOLD PARTING LINE. 14 1 MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.010 in (0.254 mm) PER SIDE 3. DIMENSIONS IN INCHES MIN. MAX. 0.291[7.39] 4. PACKAGE WEIGHT 0.85gms 0.300[7.62] * 0.394[10.01] 0.419[10.64] PART # 15 28 0.026[0.66] S28.3 STANDARD PKG. 0.032[0.81] S

Summary of the content on the page No. 14

STK15C88 Package Diagrams (continued) Figure 12. 28-Pin (330 mil) SOIC (51-85058) 51-85058-*A Document Number: 001-50593 Rev. ** Page 14 of 15 [+] Feedback

Summary of the content on the page No. 15

STK15C88 Document History Page Document Title: STK15C88 256 Kbit (32K x 8) PowerStore nvSRAM Document Number: 001-50593 Orig. of Submission Rev. ECN No. Description of Change Change Date ** 2625096 GVCH/PYRS 12/19/08 New data sheet Sales, Solutions and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products


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