Summary of the content on the page No. 1
®
MoBL ,CY62126EV30
1-Mbit (64K x 16) Static RAM
Features Functional Description
■ High speed: 45 ns The CY62126EV30 is a high performance CMOS static RAM
[1]
organized as 64K words by 16 bits . This device features
■ Temperature ranges
advanced circuit design to provide ultra low active current. This
®
❐ Industrial: –40°C to +85°C
is ideal for providing More Battery Life™ (MoBL ) in portable
❐ Automotive: –40°C to +125°C
applications such as cellular telephones. The device also has an
automati
Summary of the content on the page No. 2
® MoBL , CY62126EV30 Pin Configurations [2] Figure 1. 44-Ball VFBGA (Top View) Figure 2. 44-Pin TSOP II (Top View) Table 1. Product Portfolio Power Dissipation V Range (V) Operating, I (mA) CC CC Speed Product Range Standby, I (μA) SB2 (ns) f = 1 MHz f = f max [3] [3] [3] [3] Min Typ Max Typ Max Typ Max Typ Max CY62126EV30LL Industrial 2.2 3.0 3.6 45 1.3 2 11 16 1 4 CY62126EV30LL Automotive 2.2 3.0 3.6 55 1.3 4 11 35 1 30 Notes 2. NC pins are not connected on the die. 3. Typical values a
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® MoBL , CY62126EV30 [4, 5] DC Input Voltage ...............−0.3V to 3.6V (V + 0.3V) Maximum Ratings CCmax Output Current into Outputs (LOW)............................. 20 mA Exceeding maximum ratings may shorten the battery life of the Static Discharge Voltage.......................................... > 2001V device. These user guidelines are not tested. (MIL-STD-883, Method 3015) Storage Temperature ................................. –65°C to +150°C Latch up Current.........................
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® MoBL , CY62126EV30 Thermal Resistance Tested initially and after any design or process changes that may affect these parameters. VFBGA TSOP II Parameter Description Test Conditions Unit Package Package Θ Thermal Resistance Still Air, soldered on a 4.25 x 1.125 inch, 58.85 28.2 °C/W JA (Junction to Ambient) two-layer printed circuit board Θ Thermal Resistance 17.01 3.4 °C/W JC (Junction to Case) Figure 3. AC Test Loads and Waveforms R1 ALL INPUT PULSES V CC V CC 90% OUTPUT 90% 10% 10% GND R
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® MoBL , CY62126EV30 Switching Characteristics [10, 11] Over the Operating Range 45 ns (Industrial) 55 ns (Automotive) Parameter Description Unit Min Max Min Max Read Cycle t Read Cycle Time 45 55 ns RC t Address to Data Valid 45 55 ns AA t Data Hold from Address Change 10 10 ns OHA t CE LOW to Data Valid 45 55 ns ACE t OE LOW to Data Valid 22 25 ns DOE [12] t OE LOW to Low Z 55 ns LZOE [12, 13] t OE HIGH to High Z 18 20 ns HZOE [12] t CE LOW to Low Z 10 10 ns LZCE [12, 13] t CE HIGH to High
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® MoBL , CY62126EV30 Switching Waveforms [15, 16] Figure 5. Read Cycle No. 1(Address transition controlled) t RC ADDRESS t AA t OHA DATA OUT PREVIOUS DATA VALID DATA VALID [16, 17] Figure 6. Read Cycle No. 2 (OE controlled) ADDRESS t RC CE t PD t t HZCE ACE OE t HZOE t DOE t LZOE BHE/BLE t HZBE t DBE t LZBE HIGH IMPEDANCE HIGHI MPEDANCE DATA VALID DATA OUT t LZCE t PU I CC V 50% 50% CC I SUPPLY SB CURRENT Notes 15. The device is continuously selected. OE, CE = V , BHE, BLE, or both = V . I
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® MoBL , CY62126EV30 Switching Waveforms (continued) [14, 18, 19] Figure 7. Write Cycle No. 1 (WE controlled) t WC ADDRESS t SCE CE t t AW HA t t SA PWE WE t BW BHE/BLE OE t HD t SD NOTE 20 DATA DATA IO IN t HZOE [14, 18, 19] Figure 8. Write Cycle No. 2 (CE controlled) t WC ADDRESS t SCE CE t SA t t AW HA t PWE WE t BHE/BLE BW OE t SD t HD DATA DATA IO NOTE 20 IN t HZOE Notes 18. Data IO is high impedance if OE = V . IH 19. If CE goes HIGH simultaneously with WE = V , the output remains in a
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® MoBL , CY62126EV30 Switching Waveforms (continued) [19] Figure 9. Write Cycle No. 3 (WE controlled, OE LOW t WC ADDRESS t SCE CE t BW BHE/BLE t t AW HA t t SA PWE WE t HD t SD DATA IO NOTE 20 DATA IN t LZWE t HZWE [19] Figure 10. Write Cycle No. 4 (BHE/BLE controlled, OE LOW) t WC ADDRESS CE t SCE t t AW HA t BW BHE/BLE t SA t PWE WE t HZWE t HD t SD NOTE 20 DATA DATA IO IN t LZWE Document #: 38-05486 Rev. *E Page 8 of 13 [+] Feedback
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® MoBL , CY62126EV30 Truth Table CE WE OE BHE BLE Inputs/Outputs Mode Power H X X X X High Z Deselect/Power Down Standby (I ) SB L X X H H High Z Output Disabled Active (I ) CC LH L L L Data Out (IO –IO ) Read Active (I ) 0 15 CC LH LHL Data Out (IO –IO ); Read Active (I ) 0 7 CC IO –IO in High Z 8 15 LH L L H Data Out (IO –IO ); Read Active (I ) 8 15 CC IO –IO in High Z 0 7 L H H L L High Z Output Disabled Active (I ) CC L H H H L High Z Output Disabled Active (I ) CC L H H L H High Z Outpu
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® MoBL , CY62126EV30 Package Diagrams Figure 11. 48-Ball VFBGA (6 x 8 x 1 mm) (51-85150) BOTTOM VIEW TOP VIEW A1 CORNER Ø0.05 M C Ø0.25 M C A B A1 CORNER Ø0.30±0.05(48X) 1 2346 5 65 4 3 2 1 A A B B C C D D E E F F G G H H 1.875 A A B 0.75 6.00±0.10 3.75 B 6.00±0.10 0.15(4X) SEATING PLANE C 51-85150-*D Document #: 38-05486 Rev. *E Page 10 of 13 [+] Feedback 0.25 C 8.00±0.10 0.55 MAX. 0.26 MAX. 0.21±0.05 1.00 MAX 0.10 C 8.00±0.10 5.25 0.75 2.625
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® MoBL , CY62126EV30 Package Diagrams (continued) Figure 12. 44-Pin TSOP II (51-85087) 51-85087-*A Document #: 38-05486 Rev. *E Page 11 of 13 [+] Feedback
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® MoBL , CY62126EV30 Document History Page ® Document Title: MoBL CY62126EV30, 1-Mbit (64K x 16) Static RAM Document Number: 38-05486 Submission Orig. of Rev. ECN No. Description of Change Date Change ** 202760 See ECN AJU New data sheet *A 300835 See ECN SYT Converted from Advance Information to Preliminary Specified Typical standby power in the Features Section Changed E3 ball from DNU to NC in the Pin Configuration for the FBGA Package and removed the footnote associated with it on page #
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® MoBL , CY62126EV30 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Solutions PSoC psoc.cypress.com General psoc.cypress.com/solutions Clocks & Buffers clocks.cypress.com Low Power/Low Voltage psoc.cypress.com/low-power Wireless wireless.cypress.com Precision Analog psoc
