Cypress CY7C1399B user manual

User manual for the device Cypress CY7C1399B

Device: Cypress CY7C1399B
Category: Computer Hardware
Manufacturer: Cypress
Size: 0.31 MB
Added : 4/30/2014
Number of pages: 10
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Abstracts of contents
Summary of the content on the page No. 1

399B
CY7C1399B
32K x 8 3.3V Static RAM
active LOW Output Enable (OE) and three-state drivers. The
Features
device has an automatic power-down feature, reducing the
• Single 3.3V power supply power consumption by more than 95% when deselected.
 Ideal for low-voltage cache memory applications
An active LOW Write Enable signal (WE) controls the writing/
 High speed reading operation of the memory. When CE and WE inputs are
both LOW, data on the eight data input/output pins (I/O
0
— 10/12/15 ns
t

Summary of the content on the page No. 2

CY7C1399B Pin Configuration TSOP Top View OE 22 21 A 0 A 23 20 1 CE A 24 19 I/O 2 7 18 A 25 I/O 3 6 A 26 17 I/O 4 5 16 27 I/O WE 4 15 I/O V 28 3 CC A 1 14 GND 5 A 13 2 I/O 6 2 A7 3 12 I/O 1 A 4 11 I/O 8 0 5 10 A A 9 14 9 A A 6 10 13 A 8 7 A 11 12 Output Current into Outputs (LOW)............................. 20 mA Maximum Ratings Static Discharge Voltage .......................................... >2001V (Above which the useful life may be impaired. For user guide- (per MIL-STD-883, Method 3015)

Summary of the content on the page No. 3

CY7C1399B Electrical Characteristics Over the Operating Range (continued) 1399B-15 1399B-20 Parameter Description Test Conditions Min. Max. Min. Max. Unit V Output HIGH Voltage V = Min., I = –2.0 mA 2.4 2.4 V OH CC OH V Output LOW Voltage V = Min., I = 4.0 mA 0.4 0.4 V OL CC OL V Input HIGH Voltage 2.2 V 2.2 V V IH CC CC +0.3V +0.3V V Input LOW Voltage –0.3 0.8 –0.3 0.8 V IL I Input Load Current –1 +1 –1 +1 µ A IX I Output Leakage Current GND ≤ V ≤ V , –5 +5 –5 +5 µ A OZ I CC Output Disabled I O

Summary of the content on the page No. 4

CY7C1399B [5] Switching Characteristics Over the Operating Range 1399B–10 1399B–12 Parameter Description Min. Max. Min. Max. Unit READ CYCLE t Read Cycle Time 10 12 ns RC t Address to Data Valid 10 12 ns AA t Data Hold from Address Change 3 3 ns OHA t CE LOW to Data Valid 10 12 ns ACE t OE LOW to Data Valid 5 5 ns DOE [6] t OE LOW to Low Z 00 ns LZOE [6, 7] t OE HIGH to High Z 55 ns HZOE [6] t CE LOW to Low Z 33 ns LZCE [6, 7] t CE HIGH to High Z 56 ns HZCE t CE LOW to Power-Up 0 0 ns PU t CE HI

Summary of the content on the page No. 5

CY7C1399B [5] Switching Characteristics Over the Operating Range (Continued) 1399B–15 1399B–20 Parameter Description Min. Max. Min. Max. Unit READ CYCLE t Read Cycle Time 15 20 ns RC t Address to Data Valid 15 20 ns AA t Data Hold from Address Change 3 3 ns OHA t CE LOW to Data Valid 15 20 ns ACE t OE LOW to Data Valid 6 7 ns DOE [6] t OE LOW to Low Z 0 0 ns LZOE [6, 7] t OE HIGH to High Z 6 6 ns HZOE [6] t CE LOW to Low Z 3 3 ns LZCE [6, 7] t CE HIGH to High Z 7 7 ns HZCE t CE LOW to Power-Up 0

Summary of the content on the page No. 6

CY7C1399B Data Retention Waveform DATA RETENTION MODE 3.0V 3.0V V V > 2V CC DR t t CDR R CE Switching Waveforms [10, 11] Read Cycle No. 1 t RC ADDRESS t AA t OHA DATA OUT PREVIOUS DATA VALID DATA VALID [11, 12] Read Cycle No. 2 t RC CE t ACE OE t HZOE t DOE t HZCE t LZOE HIGH IMPEDANCE HIGH IMPEDANCE DATA OUT DATA VALID t LZCE t PD t PU V ICC CC SUPPLY 50% 50% CURRENT ISB Notes: 10. Device is continuously selected. OE, CE = V . IL 11. WE is HIGH for read cycle. 12. Address valid prior to or coi

Summary of the content on the page No. 7

CY7C1399B Switching Waveforms (continued) [8, 13, 14] Write Cycle No. 1 (WE Controlled) t WC ADDRESS CE t t AW HA t t SA PWE WE OE t SD t HD NOTE 15 DATA VALID DATA I/O IN t HZOE [8, 13, 14] Write Cycle No. 2 (CE Controlled) t WC ADDRESS t CE SCE t SA t t AW HA WE t t SD HD DATA I/O DATA VALID IN [9, 14] Write Cycle No. 3 (WE Controlled, OE LOW) t WC ADDRESS CE t t AW HA t SA WE t t SD HD DATA I/O DATA VALID NOTE 15 IN t t HZWE LZWE Notes: 13. Data I/O is high impedance if OE = V . IH 14. If CE

Summary of the content on the page No. 8

CY7C1399B Truth Table CE WE OE Input/Output Mode Power H X X High Z Deselect/Power-Down Standby (I ) SB L H L Data Out Read Active (I ) CC L L X Data In Write Active (I ) CC L H H High Z Deselect, Output Disabled Active (I ) CC Ordering Information Speed Package Operating (ns) Ordering Code Name Package Type Range 10 CY7C1399B-10VC V21 28-Lead Molded SOJ Commercial CY7C1399B-10ZC Z28 28-Lead Thin Small Outline Package CY7C1399BL-10VC V21 28-Lead Molded SOJ CY7C1399BL-10ZC Z28 28-Lead Thin Small

Summary of the content on the page No. 9

CY7C1399B Package Diagrams 28-Lead (300-Mil) Molded SOJ V21 51-85031-B 28-Lead Thin Small Outline Package Type 1 (8x13.4 mm) Z28 51-85071-*G Document #: 38-05071 Rev. *A Page 9 of 10 © Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under pa

Summary of the content on the page No. 10

CY7C1399B Revision History Document Title: CY7C1399B 32K x 8 3.3V Static RAM Document Number: 38-05071 ORIG. OF REV. ECN NO. ISSUE DATE CHANGE DESCRIPTION OF CHANGE ** 107264 05/25/01 SZV Change from Spec #: 38-01102 to 38-05071 *A 107533 06/28/01 MAX Add Low Power Document #: 38-05071 Rev. *A Page 10 of 10


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