Summary of the content on the page No. 1
®
CY62148E MoBL
4-Mbit (512K x 8) Static RAM
[1]
Features Functional Description
• Very high speed: 45 ns The CY62148E is a high performance CMOS static RAM
organized as 512K words by 8 bits. This device features
• Voltage range: 4.5V–5.5V
advanced circuit design to provide ultra low active current.
• Pin compatible with CY62148B
®
This is ideal for providing More Battery Life™ (MoBL ) in
• Ultra low standby power
portable applications such as cellular telephones. The device
also has an autom
Summary of the content on the page No. 2
® CY62148E MoBL Logic Block Diagram A 0 IO INPUT BUFFER 0 A 1 A 2 IO 1 A 3 A 4 IO 2 A 5 A 6 512K x 8 IO 3 A 7 A 8 IO ARRAY 4 A 9 A 10 IO 5 A 11 A 12 IO 6 CE IO POWER 7 COLUMN DECODER WE DOWN OE [2, 4] Pin Configuration 32-pin SOIC/TSOP II Pinout Top View V A 1 CC 17 32 A A 16 2 31 15 A A 14 3 30 18 A 12 4 29 WE A 5 A 7 28 13 A A 6 6 27 8 A A 5 26 7 9 A A 4 8 25 11 A 3 9 24 OE A 2 10 A 23 10 A 1 11 22 CE A 0 12 21 IO 7 IO 0 13 20 IO 6 IO 1 14 IO 19 5 IO 2 15 18 IO 4 V 16 17 SS IO 3 Note 4. NC
Summary of the content on the page No. 3
® CY62148E MoBL [5, 6] DC Input Voltage ............ –0.5V to 6.0V (V + 0.5V) Maximum Ratings CCmax Output Current into Outputs (LOW)............................. 20 mA Exceeding maximum ratings may impair the useful life of the Static Discharge Voltage........................................... > 2001V device. These user guidelines are not tested. (per MIL-STD-883, Method 3015) Storage Temperature ................................ –65°C to + 150°C Latch-up Current ............................
Summary of the content on the page No. 4
® CY62148E MoBL [10] Thermal Resistance SOIC TSOP II Parameter Description Test Conditions Unit Package Package Θ Thermal Resistance Still Air, soldered on a 3 × 4.5 inch, 75 77 °C/W JA (Junction to Ambient) two-layer printed circuit board Θ Thermal Resistance 10 13 °C/W JC (Junction to Case) AC Test Loads and Waveforms R1 ALL INPUT PULSES V CC OUTPUT 3.0V 90% 90% 10% 10% R2 GND 30 pF Rise Time = 1 V/ns Fall Time = 1 V/ns INCLUDING JIG AND Equivalent to: THEVENIN EQUIVALENT SCOPE R TH OUTPUT
Summary of the content on the page No. 5
® CY62148E MoBL [12] Switching Characteristics (Over the Operating Range) [2] 45 ns 55 ns Parameter Description Unit Min Max Min Max Read Cycle t Read Cycle Time 45 55 ns RC t Address to Data Valid 45 55 ns AA t Data Hold from Address Change 10 10 ns OHA t 45 55 ns CE LOW to Data Valid ACE t 22 25 ns OE LOW to Data Valid DOE [13] t 55 ns OE LOW to LOW Z LZOE [13, 14] t 18 20 ns OE HIGH to High Z HZOE [13] t 10 10 ns CE LOW to Low Z LZCE [13, 14] t 18 20 ns CE HIGH to High Z HZCE t 00 ns
Summary of the content on the page No. 6
® CY62148E MoBL Switching Waveforms [16, 17] Read Cycle No. 1 (Address Transition Controlled) tRC RC ADDRESS t AA t OHA DATA OUT PREVIOUS DATA VALID DATA VALID [17, 18] Read Cycle No. 2 (OE Controlled) ADDRESS t RC CE t ACE OE t HZOE t DOE t HZCE t LZOE HIGH IMPEDANCE HIGH IMPEDANCE DATA VALID DATA OUT t LZCE t PD I t V PU CC CC 50% SUPPLY 50% CURRENT I SB [19, 20] Write Cycle No. 1 (WE Controlled, OE HIGH During Write) t WC ADDRESS t SCE CE t t AW HA t t SA PWE WE OE t SD t HD 21 DATA IO
Summary of the content on the page No. 7
® CY62148E MoBL Switching Waveforms (continued) [19, 20] Write Cycle No. 2 (CE Controlled) t WC ADDRESS t SCE CE t SA t t AW HA t PWE WE t t SD HD DATA IO DATA VALID [20] Write Cycle No. 3 (WE Controlled, OE LOW) t WC ADDRESS t SCE CE t t AW HA t t SA PWE WE t t SD HD NOTE 21 DATA VALID DATA IO t t HZWE LZWE Truth Table CE WE OE IO’s Mode Power H X X High Z Deselect/Power down Standby (I ) SB L H L Data Out Read Active (I ) CC ) L L X Data In Write Active (I CC ) L H H High Z Selected, Outp
Summary of the content on the page No. 8
® CY62148E MoBL Ordering Information Speed Package Operating Ordering Code Package Type (ns) Diagram Range 45 CY62148ELL-45ZSXI 51-85095 32-pin Thin Small Outline Package II (Pb-free) Industrial 55 CY62148ELL-55SXI 51-85081 32-pin Small Outline Integrated Circuit (Pb-free) Industrial 55 CY62148ELL-55SXA 51-85081 32-pin Small Outline Integrated Circuit (Pb-free) Automotive-A Contact your local Cypress sales representative for availability of these parts. Package Diagrams Figure 1. 32-pin TSOP I
Summary of the content on the page No. 9
® CY62148E MoBL Package Diagrams (continued) Figure 2. 32-pin (450 MIL) Molded SOIC, 51-85081 16 1 0.546[13.868] 0.566[14.376] 0.440[11.176] 0.450[11.430] 17 32 0.793[20.142] 0.006[0.152] 0.817[20.751] 0.012[0.304] 0.101[2.565] 0.118[2.997] 0.111[2.819] MAX. 0.004[0.102] 0.047[1.193] 0.004[0.102] 0.063[1.600] 0.050[1.270] MIN. 0.023[0.584] BSC. 0.039[0.990] 0.014[0.355] 0.020[0.508] SEATING PLANE 51-85081-*B MoBL is a registered trademark, and More Battery Life is a trademark of Cypress Semico
Summary of the content on the page No. 10
® CY62148E MoBL Document History Page ® Document Title: CY62148E MoBL , 4-Mbit (512K x 8) Static RAM Document Number: 38-05442 Issue Orig. of REV. ECN NO. Description of Change Date Change ** 201580 01/08/04 AJU New Data Sheet *A 249276 See ECN SYT Changed from Advance Information to Preliminary Moved Product Portfolio to Page 2 Added RTSOP II and Removed FBGA Package Changed V stabilization time in footnote #7 from 100 µs to 200 µs CC Changed I from 2.0 µA to 2.5 µA CCDR Changed typo in Dat
