Summary of the content on the page No. 1
®
CY62167EV18 MoBL
16 Mbit (1M x 16) Static RAM
by 99 percent when addresses are not toggling. Place the device
Features
into standby mode when deselected (CE HIGH or CE LOW or
1 2
both BHE and BLE are HIGH). The input and output pins (I/O
■ Very high speed: 55 ns
0
through I/O ) are placed in a high impedance state when: the
15
■ Wide voltage range: 1.65V to 2.25V
device is deselected (CE HIGH or CE LOW); outputs are
1 2
disabled (OE HIGH); both Byte High Enable and Byte Low
■ Ultra low standb
Summary of the content on the page No. 2
® CY62167EV18 MoBL Pin Configuration [1, 2, 3] Figure 1. 48-Ball VFBGA (6 x 7 x 1mm) / (6 x 8 x 1mm) Top View 1 2 3 4 5 6 A A OE A CE BLE 0 1 2 2 A A A IO BHE CE IO B 3 4 8 1 0 A A C IO IO IO IO 5 9 10 6 1 2 V V A IO A IO cc SS 7 D 11 17 3 Vss V NC A IO IO E CC 16 12 4 F A A IO IO IO IO 14 13 14 15 5 6 A A IO IO G A WE 12 13 15 19 7 A A A A NC A H 8 9 10 11 18 Product Portfolio Power Dissipation Speed Product V Range (V) Operating I (mA) CC CC (ns) Standby I (μA) SB2 f = 1 MHz f = f max [4
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® CY62167EV18 MoBL [6, 7] DC Input Voltage ....... –0.2V to 2.45V (V (max) + 0.2V) Maximum Ratings CC Output Current into Outputs (LOW) ............................ 20 mA Exceeding the maximum ratings may impair the useful life of the Static Discharge Voltage........................................... >2001V device. These user guidelines are not tested. (MIL-STD-883, Method 3015) Storage Temperature ................................ –65°C to + 150°C Latch up Current..............................
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® CY62167EV18 MoBL Thermal Resistance Tested initially and after any design or process changes that may affect these parameters. VFBGA VFBGA Parameter Description Test Conditions Unit (6 x 7 x 1mm) (6 x 8 x 1mm) Θ Thermal Resistance Still air, soldered on a 3 × 4.5 inch, 27.74 55 °C/W JA (Junction to Ambient) two-layer printed circuit board Θ Thermal Resistance 9.84 16 °C/W JC (Junction to Case) Figure 2. AC Test Loads and Waveforms R1 ALL INPUT PULSES V CC V CC 90% OUTPUT 90% 10% 10% GND R2 3
Summary of the content on the page No. 5
® CY62167EV18 MoBL Switching Characteristics [13, 14] Over the Operating Range 55 ns Parameter Description Unit Min Max Read Cycle Read Cycle Time 55 ns t RC t Address to Data Valid 55 ns AA t Data Hold from Address Change 10 ns OHA t CE LOW and CE HIGH to Data Valid 55 ns ACE 1 2 t OE LOW to Data Valid 25 ns DOE [15] t OE LOW to Low-Z 5ns LZOE [15, 16] t OE HIGH to High-Z 18 ns HZOE [15] t CE LOW and CE HIGH to Low-Z 10 ns LZCE 1 2 [15, 16] t CE HIGH and CE LOW to High-Z 18 ns HZCE 1 2 t C
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® CY62167EV18 MoBL Switching Waveforms [18, 19] Figure 4 shows address transition controlled read cycle waveforms. Figure 4. Read Cycle No. 1 t RC RC ADDRESS t AA t OHA DATA OUT PREVIOUS DATA VALID DATA VALID [19, 20] Figure 5 shows OE controlled read cycle waveforms. Figure 5. Read Cycle No. 2 ADDRESS t RC CE 1 t PD t HZCE CE 2 t ACE BHE/BLE t DBE t HZBE t LZBE OE t HZOE t DOE t LZOE HIGH IMPEDANCE HIGH IMPEDANCE DATA OUT DATA VALID t LZCE t I PU CC V CC 50% 50% SUPPLY I SB CURRENT Notes 18.
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® CY62167EV18 MoBL Switching Waveforms (continued) [17, 21, 22] Figure 6 shows WE controlled write cycle waveforms. Figure 6. Write Cycle No. 1 t WC ADDRESS t SCE CE 1 CE 2 t t AW HA t t SA PWE WE t BW BHE/BLE OE t HD t SD NOTE 23 DATA I/O VALID DATA t HZOE Notes 21. Data IO is high impedance if OE = V . IH 22. If CE goes HIGH and CE goes LOW simultaneously with WE = V , the output remains in a high impedance state. 1 2 IH 23. During this period the IOs are in output state. Do not apply input s
Summary of the content on the page No. 8
® CY62167EV18 MoBL Switching Waveforms (continued) [17, 21, 22] Figure 7 shows CE or CE controlled write cycle waveforms. 1 2 Figure 7. Write Cycle No. 2 t WC ADDRESS t SCE CE 1 CE 2 t SA t t AW HA t PWE WE t BW BHE/BLE OE t HD t SD DATA I/O NOTE 23 VALID DATA t HZOE [22] Figure 8 shows WE controlled, OE LOW write cycle waveforms. Figure 8. Write Cycle No. 3 t WC ADDRESS t SCE CE 1 CE 2 t BW BHE/BLE t t AW HA t t SA PWE WE t t SD HD NOTE 23 DATA I/O VALID DATA t t LZWE HZWE Document #: 38-0544
Summary of the content on the page No. 9
® CY62167EV18 MoBL Switching Waveforms (continued) [22] Figure 9 shows BHE/BLE controlled, OE LOW write cycle waveforms. Figure 9. Write Cycle No. 4 t WC ADDRESS CE 1 CE 2 t SCE t t AW HA t BW BHE/BLE t SA t PWE WE t t SD HD DATA IO NOTE 23 VALID DATA Truth Table CE CE WE OE BHE BLE Inputs/Outputs Mode Power 1 2 H XXXXX High Z Deselect / Power Down Standby (I ) SB X L XXXX High Z Deselect / Power Down Standby (I ) SB XXXX H H High Z Deselect / Power Down Standby (I ) SB L H H L L L Data Out (I/
Summary of the content on the page No. 10
® CY62167EV18 MoBL Ordering Information Speed Package Operating Package Type (ns) Ordering Code Diagram Range 55 CY62167EV18LL-55BAXI 001-13297 48-ball VFBGA (6 × 7 × 1 mm) (Pb-free) Industrial CY62167EV18LL-55BVI 51-85150 48-ball VFBGA (6 × 8 × 1 mm) CY62167EV18LL-55BVXI 48-ball VFBGA (6 × 8 × 1 mm) (Pb-free) [5] CY62167EV30LL-45BVI 51-85150 48-ball VFBGA (6 × 8 × 1 mm) Package Diagram Figure 10. 48-Ball VFBGA (6 x 7 x 1 mm), 001-13297 NOTES: 1. ALL DIMENSION ARE IN MM [MAX/MIN] 2. JEDEC REFERE
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® CY62167EV18 MoBL Package Diagram Figure 11. 48-Ball VFBGA (6 x 8 x 1 mm), 51-85150 BOTTOM VIEW TOP VIEW A1 CORNER Ø0.05 M C Ø0.25 M C A B A1 CORNER Ø0.30±0.05(48X) 1 2346 5 65 4 3 2 1 A A B B C C D D E E F F G G H H 1.875 A A 0.75 B 6.00±0.10 3.75 B 6.00±0.10 0.15(4X) SEATING PLANE C 51-85150-*D Document #: 38-05447 Rev. *G Page 11 of 13 [+] Feedback 0.25 C 8.00±0.10 0.26 MAX. 0.55 MAX. 0.21±0.05 1.00 MAX 0.10 C 8.00±0.10 5.25 0.75 2.625
Summary of the content on the page No. 12
® CY62167EV18 MoBL Document History Page ® Document Title: CY62167EV18 MoBL 16 Mbit (1M x 16) Static RAM Document Number: 38-05447 Orig. of Submission REV. ECN NO. Change date Description of Change ** 202600 AJU 01/23/2004 New Data Sheet *A 463674 NXR See ECN Converted from Advance Information to Preliminary Changed V from 2.20V to 2.25V CC(max) Removed ‘L’ bin and 35 ns speed bin from product offering Changed ball E3 from DNU to NC Removed redundant foot note on DNU Changed the I value from 1.
Summary of the content on the page No. 13
® CY62167EV18 MoBL Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Solutions PSoC psoc.cypress.com General psoc.cypress.com/solutions Clocks & Buffers clocks.cypress.com Low Power/Low Voltage psoc.cypress.com/low-power Wireless wireless.cypress.com Precision Analog psoc.cyp
