Cypress CY62147DV30 user manual

User manual for the device Cypress CY62147DV30

Device: Cypress CY62147DV30
Category: Computer Hardware
Manufacturer: Cypress
Size: 0.62 MB
Added : 4/6/2014
Number of pages: 12
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Abstracts of contents
Summary of the content on the page No. 1


CY62147DV30
4-Mbit (256K x 16) Static RAM
vanced circuit design to provide ultra-low active current. This
Features
®
is ideal for providing More Battery Life™ (MoBL ) in portable
• Temperature Ranges applications such as cellular telephones. The device also has
an automatic power-down feature that significantly reduces
— Industrial: –40°C to +85°C
power consumption. The device can also be put into standby
— Automotive-A: –40°C to +85°C
mode reducing power consumption by more than 99% when
dese

Summary of the content on the page No. 2

CY62147DV30 [2, 3, 4] Pin Configuration VFBGA (Top View) 44 TSOP II (Top View) 1 2 3 4 5 6 44 A 1 A 4 5 A OE A A NC A 2 43 A BLE 0 1 2 A 3 6 3 42 A A 2 7 4 41 A OE 1 A A I/O BHE CE I/O B 4 8 3 0 40 5 A BHE 0 39 6 CE BLE 38 I/O I/O A A C 7 I/O I/O I/O I/O 0 15 5 9 10 6 1 2 37 I/O 8 I/O 1 14 36 I/O 9 I/O 2 13 Vcc V A I/O A I/O SS 7 D 35 11 17 3 I/O 10 I/O 3 12 34 11 V V CC SS 33 Vss V 12 V V DNU A SS CC I/O I/O E CC 16 12 4 I/O 13 32 I/O 4 11 31 I/O I/O 5 14 10 F A A I/O I/O I/O I/O I/O 30 15

Summary of the content on the page No. 3

CY62147DV30 Output Current into Outputs (LOW)............................. 20 mA Maximum Ratings Static Discharge Voltage........................................... >2001V (Above which the useful life may be impaired. For user guide- (per MIL-STD-883, Method 3015) lines, not tested.) Latch-up Current...................................................... >200 mA Storage Temperature .................................–65°C to +150°C Operating Range Ambient Temperature with Power Applied...........

Summary of the content on the page No. 4

CY62147DV30 [10] Capacitance (for all packages) Parameter Description Test Conditions Max. Unit C Input Capacitance T = 25°C, f = 1 MHz, 10 pF IN A V = V CC CC(typ) C Output Capacitance 10 pF OUT [10] Thermal Resistance Parameter Description Test Conditions VFBGA TSOP II Unit Θ Thermal Resistance Still Air, soldered on a 3 × 4.5 inch, four-layer 72 75.13 °C/W JA (Junction to Ambient) printed circuit board Θ Thermal Resistance 8.86 8.95 °C/W JC (Junction to Case) [10] AC Test Loads and Waveform

Summary of the content on the page No. 5

CY62147DV30 [14] Switching Characteristics Over the Operating Range [11] 45 ns 55 ns 70 ns Parameter Description Min. Max. Min. Max. Min. Max. Unit Read Cycle t Read Cycle Time 45 55 70 ns RC t Address to Data Valid 45 55 70 ns AA t Data Hold from Address Change 10 10 10 ns OHA t CE LOW to Data Valid 45 55 70 ns ACE t OE LOW to Data Valid 25 25 35 ns DOE [15] t OE LOW to LOW Z 5 5 5 ns LZOE [15, 16] t OE HIGH to High Z 15 20 25 ns HZOE [15] t CE LOW to Low Z 10 10 10 ns LZCE [15, 16] t CE HIG

Summary of the content on the page No. 6

CY62147DV30 Switching Waveforms [18, 19] Read Cycle 1 (Address Transition Controlled) t RC ADDRESS t AA t OHA DATA OUT PREVIOUS DATA VALID DATA VALID [19, 20] Read Cycle No. 2 (OE Controlled) ADDRESS t RC CE t PD t t HZCE ACE OE t HZOE t DOE BHE/BLE t LZOE t HZBE t DBE t LZBE HIGH IMPEDANCE HIGH IMPEDANCE DATA OUT DATA VALID t LZCE t PU V I CC CC SUPPLY 50% 50% CURRENT I SB Notes: 18. The device is continuously selected. OE, CE = V , BHE and/or BLE = V . IL IL 19. WE is HIGH for read cycle.

Summary of the content on the page No. 7

CY62147DV30 Switching Waveforms (continued) [17, 21, 22] Write Cycle No. 1 (WE Controlled) t WC ADDRESS t SCE CE t t AW HA t t SA PWE WE t BW BHE/BLE OE t SD t HD DATA I/O NOTE23 DATA IN t HZOE [17, 21, 22] Write Cycle No. 2 (CE Controlled) t WC ADDRESS t SCE CE t SA t t AW HA t PWE WE t BW BHE/BLE OE t SD t HD DATA I/O DATA IN NOTE 23 t HZOE Notes: 21. Data I/O is high impedance if OE = V . IH 22. If CE goes HIGH simultaneously with WE = V , the output remains in a high-impedance state. IH

Summary of the content on the page No. 8

CY62147DV30 Switching Waveforms (continued) [22] Write Cycle No. 3 (WE Controlled, OE LOW) t WC ADDRESS t SCE CE t BW BHE/BLE t t AW HA t t SA PWE WE t HD t SD NOTE 23 DATAI/O DATA IN t HZWE t LZWE [22] Write Cycle No. 4 (BHE/BLE Controlled, OE LOW) t WC ADDRESS CE t SCE t t AW HA t BW BHE/BLE t SA t PWE WE t HZWE t t HD SD DATA I/O DATA NOTE 23 IN t LZWE Document #: 38-05340 Rev. *F Page 8 of 12 [+] Feedback

Summary of the content on the page No. 9

CY62147DV30 Truth Table CE WE OE BHE BLE Inputs/Outputs Mode Power H X X X X High Z Deselect/Power-Down Standby (I ) SB X X X H H High Z Deselect/Power-Down Standby (I ) SB L H L L L Data Out (I/O –I/O ) Read Active (I ) O 15 CC L H L H L Data Out (I/O –I/O ); Read Active (I ) O 7 CC I/O –I/O in High Z 8 15 L H L L H Data Out (I/O –I/O ); Read Active (I ) 8 15 CC I/O –I/O in High Z 0 7 L H H L L High Z Output Disabled Active (I ) CC L H H H L High Z Output Disabled Active (I ) CC L H H L H

Summary of the content on the page No. 10

CY62147DV30 Package Diagram 48-ball VFBGA (6 x 8 x 1 mm) (51-85150) BOTTOM VIEW TOP VIEW A1 CORNER Ø0.05 M C Ø0.25 M C A B A1 CORNER Ø0.30±0.05(48X) 1 2346 5 65 4 3 2 1 A A B B C C D D E E F F G G H H 1.875 A A B 0.75 6.00±0.10 3.75 B 6.00±0.10 0.15(4X) 51-85150-*D SEATING PLANE C Document #: 38-05340 Rev. *F Page 10 of 12 [+] Feedback 0.25 C 8.00±0.10 0.26 MAX. 0.55 MAX. 0.21±0.05 1.00 MAX 0.10 C 8.00±0.10 5.25 0.75 2.625

Summary of the content on the page No. 11

CY62147DV30 Package Diagram (continued) 44-Pin TSOP II (51-85087) 51-85087-*A MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05340 Rev. *F Page 11 of 12 © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no re

Summary of the content on the page No. 12

CY62147DV30 Document History Page ® Document Title:CY62147DV30 MoBL 4-Mbit (256K x 16) Static RAM Document Number: 38-05340 Orig. of REV. ECN NO. Issue Date Change Description of Change ** 127481 06/17/03 HRT New Data Sheet *A 131010 01/23/04 CBD Changed from Advance to Preliminary *B 213252 See ECN AJU Changed from Preliminary to Final Added 70 ns speed bin Modified footnote 7 to include ramp time and wait time Modified input and output capacitance values to 10 pF Modified Thermal Resistance


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