Summary of the content on the page No. 1
®
CY62158E MoBL
8-Mbit (1M x 8) Static RAM
®
is ideal for providing More Battery Life™ (MoBL ) in portable
Features
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
■ Very high speed: 45 ns
consumption. Placing the device into standby mode reduces
❐ Wide voltage range: 4.5V – 5.5V
power consumption significantly when deselected (CE HIGH or
1
■ Ultra low active power
CE LOW).
2
❐ Typical active current:1.8 mA @ f = 1
Summary of the content on the page No. 2
® CY62158E MoBL Pin Configuration [1] Figure 1. 44-Pin TSOP II (Top View) A A 4 1 44 5 A A 3 2 43 6 A A 2 3 42 7 A 4 41 OE 1 A 5 40 CE 0 2 CE 6 39 A 1 8 NC 7 38 NC NC 8 37 NC IO 36 9 IO 0 7 IO 10 35 IO 1 6 34 V V 11 SS CC 12 V 33 V CC SS 13 32 IO IO 5 2 IO 14 IO 31 3 4 15 NC 30 NC NC 16 29 NC WE 17 28 A 9 A A 18 27 19 10 A 19 26 A 18 11 A 20 25 A 17 12 A 21 24 A 16 13 22 A 23 A 14 15 Product Portfolio Power Dissipation Speed Product V Range (V) Operating I (mA) CC CC (ns) Standby I (μA) SB2
Summary of the content on the page No. 3
® CY62158E MoBL [3, 4] DC Input Voltage .....................–0.5V to V + 0.5V Maximum Ratings CC(max) Output Current into Outputs (LOW)............................. 20 mA Exceeding the maximum ratings may impair the useful life of the Static Discharge Voltage............................................ >2001V device. These user guidelines are not tested. (MIL-STD-883, Method 3015) Storage Temperature.................................. –65°C to +150°C Latch up Current.............................
Summary of the content on the page No. 4
® CY62158E MoBL Figure 2. AC Test Loads and Waveforms R1 V ALL INPUT PULSES CC 3V 90% OUTPUT 90% 10% 10% GND R2 100 pF Fall Time = 1 V/ns Rise Time = 1 V/ns INCLUDING JIG AND SCOPE Equivalent to: THÉVENIN EQUIVALENT R TH OUTPUT V Parameters 5.0V Unit R1 1838 Ω R2 994 Ω R 645 Ω TH V 1.75 V TH Data Retention Characteristics Over the Operating Range [2] Parameter Description Conditions Min Typ Max Unit V V for Data Retention 2 V DR CC [6] I Data Retention Current V = V 8 μA CCDR CC DR CE > V − 0
Summary of the content on the page No. 5
® CY62158E MoBL Switching Characteristics [9] Over the Operating Range 45 ns Parameter Description Unit Min Max Read Cycle t Read Cycle Time 45 ns RC t Address to Data Valid 45 ns AA t Data Hold from Address Change 10 ns OHA t CE LOW and CE HIGH to Data Valid 45 ns ACE 1 2 t OE LOW to Data Valid 22 ns DOE [10] t OE LOW to Low Z 5ns LZOE [10, 11] t OE HIGH to High Z 18 ns HZOE [10] t CE LOW and CE HIGH to Low Z 10 ns LZCE 1 2 [10, 11] t CE HIGH or CE LOW to High Z 18 ns HZCE 1 2 t CE LOW and C
Summary of the content on the page No. 6
® CY62158E MoBL Switching Waveforms [13, 14] Figure 4 shows address transition controlled read cycle waveforms. Figure 4. Read Cycle No. 1 t RC ADDRESS t AA t OHA DATA OUT PREVIOUS DATA VALID DATA VALID [14, 15] Figure 5 shows OE controlled read cycle waveforms. Figure 5. Read Cycle No. 2 ADDRESS t RC CE 1 CE 2 t ACE OE t HZOE t DOE t HZCE t LZOE HIGH IMPEDANCE HIGH IMPEDANCE DATA OUT DATA VALID t LZCE t PD V CC t I PU CC SUPPLY 50% 50% I CURRENT SB Notes 13. Device is continuously selected.
Summary of the content on the page No. 7
® CY62158E MoBL Switching Waveforms (continued) [12, 16, 17] Figure 6 shows WE controlled write cycle waveforms. Figure 6. Write Cycle No. 1 t WC ADDRESS t SCE CE 1 CE 2 t t AW HA t t SA PWE WE OE t SD t HD VALID DATA DATA IO NOTE 18 t HZOE [12, 16, 17] Figure 7 shows CE or CE controlled write cycle waveforms. 1 2 Figure 7. Write Cycle No. 2 t WC ADDRESS t SCE CE 1 t SA CE 2 t t AW HA t PWE WE OE t t SD HD DATA IO VALID DATA Notes 16. Data IO is high impedance if OE = V . IH 17. If CE goes HIG
Summary of the content on the page No. 8
® CY62158E MoBL Switching Waveforms (continued) [17] Figure 8 shows WE controlled, OE LOW write cycle waveforms. Figure 8. Write Cycle No. 3 t WC ADDRESS t SCE CE 1 CE 2 t t AW HA t t SA PWE WE t t SD HD DATA IO NOTE 18 VALID DATA t t HZWE LZWE Truth Table CE CE WE OE Inputs/Outputs Mode Power 1 2 H X X X High Z Deselect/Power Down Standby (I ) SB X L X X High Z Deselect/Power Down Standby (I ) SB L H H L Data Out Read Active (I ) CC L H H H High Z Output Disabled Active (I ) CC L H L X Data in
Summary of the content on the page No. 9
® CY62158E MoBL Package Diagrams Figure 9. 44-Pin TSOP II, 51-85087 51-85087-*A Document #: 38-05684 Rev. *D Page 9 of 10 [+] Feedback
Summary of the content on the page No. 10
® CY62158E MoBL Document History Page ® Document Title: CY62158E MoBL 8-Mbit (1M x 8) Static RAM Document Number: 38-05684 Orig. of REV. ECN NO. Issue Date Change Description of Change ** 270350 See ECN PCI New Data Sheet *A 291271 See ECN SYT Converted from Advance Information to Preliminary Changed input pulse level from V to 3V in the AC Test Loads and Waveforms CC Modified footnote #9 to include timing reference level of 1.5V and input pulse level of 3V *B 1462592 See ECN VKN/AESA Converte
