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Contents
HP E1459A 64-Channel Isolated Input Interrupt Module
Edition 3
Warranty ....................................................................................................................... 5
Safety Symbols ............................................................................................................. 6
WARNINGS................................................................................................................. 6
Declaration of Conformity.....................
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Chapter 3 HP E1459A SCPI Command Reference .................................................................... 39 DIAGnostic:SYSReset Subsystem ............................................................................. 41 DIAGnostic:SYSReset[:STATe]? ....................................................................... 41 DIAGnostic:SYSReset:ENABle ............................................................ 41 DIAGnostic:SYSReset:ENABle? ...........................................
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STATus:QUEStionable:CONDition? .................................................................66 STATus:QUEStionable:ENABle .......................................................... 66 STATus:QUEStionable:ENABle? ......................................................................67 STATus:QUEStionable[:EVENt]? ...................................................................... 67 SYSTem Subsystem ....................................................................................
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4 Contents
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Certification Hewlett-Packard Company certifies that this product met its published specifications at the time of shipment from the factory. Hewlett- Packard further certifies that its calibration measurements are traceable to the United States National Institute of Standards and Technology (formerly National Bureau of Standards), to the extent allowed by that organization's calibration facility, and to the calibration facilities of other International Standards Organization members. Warranty
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Documentation History All Editions and Updates of this manual and their creation date are listed below. The first Edition of the manual is Edition 1. The Edition number increments by 1 whenever the manual is revised. Updates, which are issued between Editions, contain replacement pages to correct or add additional information to the current Edition of the manual. Whenever a new Edition is created, it will contain all of the Update information for the previous Edition. Each new Edition or Upda
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Declaration of Conformity according to ISO/IEC Guide 22 and EN 45014 Manufacturer's Name: Hewlett-Packard Company Loveland Manufacturing Center declares, that the product: Product Name: 64-Channel Isolated Digital Input / Interrupt Module Model Number: HP E1459A (formerly HP Z2404B) Product Options: All conforms to the following Product Specifications: Safety: IEC 1010-1 (1990) Incl. Amend 1 (1992)/EN61010-1/A2 (1995) CSA C22.2 #1010.1 (1992) UL 3111 EMC: CISPR 11:1990/EN55011 (1991): Group1 Cla
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Notes: 8
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Please fold and tape for mailing Reader Comment Sheet HP E1459A / Z2404B 64-Channel Isolated Input / Interrupt Module User’s Manual Edition 3 You can help us improve our manuals by sharing your comments and suggestions. In appreciation of your time, we will enter you in a quarterly drawing for a Hewlett-Packard Palmtop Personal Computer (U.S. government employees are not eligible for the drawing). Your Name City, State/Province Company Name Country Job Title Zip/Postal Code Address Telephone N
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Chapter 1 Installing and Configuring the HP E1459A The HP E1459A 64-Channel Isolated Digital Input/Interrupt module 1 (formerly known as the HP Z2404B ) provides 64 isolated digital input channels configured as four 16-bit ports. The module is used for sensing signals and detecting edge changes on digital inputs. The module is a C-Size VXIbus register-based product that operates in a C-Size VXIbus mainframe. Each isolated channel can withstand up to 115 Vac RMS or 115 Vdc difference in grou
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To VXIbus Transceivers Figure 1-1. HP E1459A 64-Channel Isolated Digital Input/Interrupt Block Diagram 12 Installing and Configuring the HP E1459A
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The HP E1459A can be programmed to monitor channel occurrences either internally with a 1.0 MHz sample clock, or externally, with a sourced capture clock. Using either clocking technique, data channels may function as edge detect inputs and/or data capture inputs. Events at any channel may occur simultaneously or in overlap with events on any other channel. Figure 1-2 is a block diagram of the hardware interrupt resolver circuit. User software algorithms are also necessary to resolve issu
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Watchdog Timer The HP E1459A provides a programmable timer facility which, in the event of time-out, will generate a "system wide" reset to all other card-cage modules. This timer may be disabled by the SCPI command DIAG:SYSR:ENAB OFF. Input Level Each channel is capable of operation over an input range from 2.0 through 60.0 Vdc. Input voltages are grouped into voltage ranges which are selected Selection via a series of jumpers on the module. These jumpers are described in more detail begi
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Caution The user MUST ensure, based upon the programmed debounce period and internal delays, that data to be captured has propagated the debouncers and is fully setup prior to the assertion of the externally generated capture clock. The module has two primary modes of operation: the module can interrupt your software when an event occurs or your software can periodically poll the module to determine if an event has occurred. If the channel data registers are serviced via a "polled mode" me
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Edge Detection Figure 1-3 demonstrates a typical example. A channel that has been programmed to detect both positive and negative edge transitions posts a Examples marker at the occurrence of a positive edge. Before user software can service this interrupt, a negative transition occurs and is detected. Because both are detected and the events are marked, user software first reads the positive edge detect register and then the negative edge detect register. Figure 1-3. Positive and Negative
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Input Data Capture The state of any channel, within any channel group, may be captured for subsequent processing (as data) by an externally sourced capture clock (XTRIG0N - XTRIG3N, the external trigger inputs for each port). Data channels may be interspersed among all 64 channel inputs, but the user is cautioned to ensure that all setup criteria and clock sources coincide with requirements for synchronization. (Each channel group shares a common capture clock which may not necessarily be
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Front Panel Markers All "Data Available" and "Edge Detect" marker bits are physically available via the HP E1459A front panel. These outputs are TTL/HC compatible and may be used to trigger other system-wide events or to provide logging information for statistical tracking or other performance analysis purposes. Interrupt Driven or Interrupts may be programmatically disabled for both edge-detect and data-capture events. All registers remain active and valid and may be Polled Mode serviced o
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Configuring for Installation Before installing the module you should verify that the following jumpers and switches are set correctly. • Logical Address dip switch • Interrupt priority jumper positions • Input threshold levels • Reset time of the Watchdog Timer WARNING SHOCK HAZARD. Only qualified, service-trained personnel who are aware of the hazards involved should install, configure, or remove the module. Disconnect all power sources from the mainframe, the terminal module and installed
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Setting the Logical Each module within the VXIbus mainframe must be set to a unique logical address. The setting is controlled by an 8 pin dip switch. This allows for Address values from 0 to 255. The factory setting of this switch is decimal 144. No two modules in the same mainframe can have the same logical address. The location is shown in Figure 1-5. Setting the Interrupt At power on, after a SYSRESET, or after resetting the module via the control register, all masks will be cleared, i
