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¡ Semiconductor MSM80C154S/83C154S
¡ Semiconductor
MSM80C154S/83C154S
CMOS 8-bit Microcontroller
GENERAL DESCRIPTION
The MSM80C154S/MSM83C154S, designed for the high speed version of the existing
MSM80C154/MSM83C154, is a higher performance 8-bit microcontroller providing low-power
consumption.
The MSM80C154S/MSM83C154S covers the functions and operating range of the existing
MSM80C154/83C154/80C51F/80C31F.
The MSM80C154S is identical to the MSM83C154S except it does not contain the internal
pro
Summary of the content on the page No. 2
MSM80C154S/83C154S ¡ Semiconductor • Package options 40-pin plastic DIP (DIP40-P-600-2.54) : (Product name: MSM80C154SRS/ MSM83C154S-xxxRS) 44-pin plastic QFP (QFP44-P-910-0.80-2K) : (Product name: MSM80C154SGS-2K/ MSM83C154S-xxxGS-2K) 44-pin QFJ (QFJ44-P-S650-1.27) : (Product name: MSM80C154SJS/ MSM83C154S-xxxJS) 44-pin TQFP (TQFP44-P-1010-0.80-K) : (Product name: MSM80C154STS-K/ MSM83C154S-xxxTS-K) xxx: indicates the code number 260
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¡ Semiconductor MSM80C154S/83C154S BLOCK DIAGRAM (MSM83C154S) 261 P2.0 DPH CONTROL SIGNAL R/W SIGNAL P2.7 ROM SPECIAL P0.0 FUNCTION DPL PLA REGISTER ADDRESS PCHL PCLL 16K WORDS x 8BITS DECODER P0.7 XTAL1 PCH PCL SP IR AIR SENSE AMP XTAL2 C-ROM ALE PSEN EA R/W AMP T2CON TL2 TH2 TR1 ACC TR2 RESET RAM RAMDP P1.0 256 WORDS RCAP2L RCAP2H BR PSW x 8BITS TIMER/ ALU COUNTER 2 P1.7 P3.0 TH1 TL1 TH0 TL0 TMOD TCON IE IP SBUF(T) SBUF(R) SCON P3.7 INTERRUPT SERIAL IO TIMER/COUNTER 0 & 1 PORT 3 PORT 1 OSC a
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MSM80C154S/83C154S ¡ Semiconductor PIN CONFIGURATION (TOP VIEW) P1.0/T2 1 40 V CC P1.1/T2EX 2 39 P0.0 P1.2 3 38 P0.1 P1.3 4 37 P0.2 P1.4 5 36 P0.3 P1.5 6 35 P0.4 P1.6 7 34 P0.5 P1.7 8 33 P0.6 RESET 9 32 P0.7 P3.0/RXD 10 31 EA P3.1/TXD 11 30 ALE P3.2/INT0 12 29 PSEN P3.3/INT1 13 28 P2.7 P3.4/T0 14 27 P2.6 P3.5/T1/HPDI 15 26 P2.5 P3.6/WR 16 25 P2.4 P3.7/RD 17 24 P2.3 XTAL2 18 23 P2.2 XTAL1 19 22 P2.1 V 20 21 P2.0 SS 40-Pin Plastic DIP 262
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¡ Semiconductor MSM80C154S/83C154S PIN CONFIGURATION (Continued) P1.5 1 P0.4 33 P1.6 2 P0.5 32 P1.7 3 P0.6 31 RESET 4 P0.7 30 P3.0/RXD 5 EA 29 NC 6 NC 28 P3.1/TXD 7 ALE 27 P3.2/INT0 8 PSEN 26 P3.3/INT1 9 P2.7 25 P3.4/T0 10 P2.6 24 P3.5/T1/HPDI 11 P2.5 23 NC : No-connection pin 44-Pin Plastic QFP 263 P3.6/WR 12 44 P1.4 P3.7/RD 13 43 P1.3 XTAL2 14 42 P1.2 XTAL1 15 41 P1.1 V 16 40 P1.0 SS V 17 39 NC SS P2.0 18 38 V CC P2.1 19 37 P0.0 P2.2 20 36 P0.1 P2.3 21 35 P0.2 P2.4 22 34 P0.3
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MSM80C154S/83C154S ¡ Semiconductor P1.5 P0.4 1 33 P1.6 P0.5 2 32 P1.7 P0.6 3 31 RESET P0.7 4 30 P3.0/RXD EA 5 29 NC NC 6 28 P3.1/TXD ALE 7 27 P3.2/INT0 PSEN 8 26 P3.3/INT1 P2.7 9 25 P3.4/T0 P2.6 10 24 P3.5/T1/HPDI P2.5 11 23 NC : No-connection pin 44-Pin Plastic TQFP 264 P3.6/WR 12 44 P1.4 P3.7/RD 13 43 P1.3 XTAL2 14 42 P1.2 XTAL1 15 41 P1.1 V 16 40 P1.0 SS V 17 39 NC SS P2.0 18 38 V CC P2.1 19 37 P0.0 P2.2 20 36 P0.1 P2.3 21 35 P0.2 P2.4 22 34 P0.3
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¡ Semiconductor MSM80C154S/83C154S PIN CONFIGURATION (Continued) P0.3 40 28 P2.4 P0.2 41 27 P2.3 P0.1 42 26 P2.2 P0.0 43 25 P2.1 V 44 24 P2.0 CC NC 1 23 NC P1.0/T2 2 22 V SS P1.1/T2EX 3 21 XTAL1 P1.2 4 20 XTAL2 P1.3 5 19 P3.7/RD P1.4 6 18 P3.6/WR NC : No-connection pin 44-Pin Plastic QFJ 265 P1.5 7 39 P0.4 P1.6 8 38 P0.5 P1.7 9 37 P0.6 RESET 10 36 P0.7 P3.0/RXD 11 35 EA NC 12 34 NC P3.1/TXD 13 33 ALE P3.2/INT0 14 32 PSEN P3.3/INT1 15 31 P2.7 P3.4/T0 16 30 P2.6 P3.5/T1/HPDI 17 29 P2.5
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MSM80C154S/83C154S ¡ Semiconductor PIN DESCRIPTIONS Symbol Descriptipn P0.0 to P0.7 Bidirectional I/O ports. They are also the data/address bus (input/output of data and output of lower 8-bit address when external memory is accessed). They are open-drain outputs when used as I/O ports, but 3-state outputs when used as data/address bus. P1.0 to P1.7 P1.0 to P1.7 are quasi-bidirectional I/O ports. They are pulled up internally when used as input ports. Two of them have the following secondar
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¡ Semiconductor MSM80C154S/83C154S PIN Descriptions (Continued) Symbol Descriptipn RESET If this pin remains "H" for at least one machine cycle, the MSM80C154S/MSM83C154S is reset. Since this pin is pulled down internally, a power-on reset is achieved by simply connecting a capacitor between V and this pin. CC XTAL1 Oscillator inverter input pin. External clock is input through XTAL1 pin. XTAL2 Oscillator inverter output pin. V Power supply pin during both normal operation and standby operati
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MSM80C154S/83C154S ¡ Semiconductor REGISTERS Diagram of Special Function Registers BIT ADDRESS DIRECT REGISTER ADDRESS NAME b7 b6 b5 b4 b3 b2 b1 b0 IOCON FF FE FD FC FB FA F9 F8 0F8H (248) B F7 F6 F5 F4 F3 F2 F1 F0 0F0H (240) ACC E7 E6 E5 E4 E3 E2 E1 E0 0E0H (224) PSW D7 D6 D5 D4 D3 D2 D1 D0 0D0H (208) TH2 0CDH (205) TL2 0CCH (204) RCAP2H 0CBH (203) RCAP2L 0CAH (202) T2CON CF CE CD CC CB CA C9 C8 0C8H (200) IP BF BE BD BC BB BA B9 B8 0B8H (184) P3 B7 B6 B5 B4 B3 B2 B1 B0 0B0H (176) IE AF AE AD
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¡ Semiconductor MSM80C154S/83C154S Special Function Registers Timer mode register (TMOD) MSB LSB NAME ADDRESS 76543210 TMOD 89H GATE C/T M1 M0 GATE C/T M1 M0 BIT LOCATION FLAG FUNCTION TMOD.0 M0 M1 M0 Timer/counter 0 mode setting 00 8-bit timer/counter with 5-bit prescalar. 01 16-bit timer/counter. 10 8-bit timer/counter with 8-bit auto reloading. TMOD.1 M1 11 Timer/counter 0 separated into TLO (8-bit) timer/counter and TH0 (8-bit) timer/counter. TF0 is set by TL0 carry, and TF1 is set by TH0
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MSM80C154S/83C154S ¡ Semiconductor Power control register (PCON) MSB LSB NAME ADDRESS 76543210 PCON 87H SMOD HPD RPD — GF1 GF0 PD IDL BIT LOCATION FLAG FUNCTION PCON.0 IDL IDLE mode is set when this bit is set to "1". CPU operations are stopped when IDLE mode is set, but XTAL1•2, timer/counters 0, 1 and 2, the interrupt circuits, and the serial port remain active. IDLE mode is cancelled when the CPU is reset or when an interrupt is generated. PCON.1 PD PD mode is set when this bit is set to
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¡ Semiconductor MSM80C154S/83C154S Timer control register (TCON) MSB LSB NAME ADDRESS 76543210 TCON 88H TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 BIT LOCATION FLAG FUNCTION TCON.0 IT0 External interrupt 0 signal is used in level-detect mode when this bit is "0" and in trigger detect mode when "1". TCON.1 IE0 Interrupt request flag for external interrupt 0. The bit is reset automatically when an interrupt is serviced. The bit can be set and reset by software when IT0 = "1". TCON.2 IT1 External interrupt 1
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MSM80C154S/83C154S ¡ Semiconductor Serial port control register (SCON) MSB LSB NAME ADDRESS 76543210 SCON 98H SM0 SM1 SM2 REN TB8 RB8 TI RI BIT LOCATION FLAG FUNCTION SCON.0 RI "End of serial port reception" interrupt request flag. This flag must be reset by software during interrupt service routine. This flag is set after the eighth bit of data has been received when in mode 0, or by the STOP bit when in any other mode. In mode 2 or 3, however, RI is not set if the RB8 data is "0" with SM2
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¡ Semiconductor MSM80C154S/83C154S Interrupt enable register (IE) MSB LSB NAME ADDRESS 76543210 IE 0A8H EA — ET2 ES ET1 EX1 ET0 EX0 BIT LOCATION FLAG FUNCTION IE.0 EX0 Interrupt control bit for external interrupt 0. Interrupt disabled when bit is "0". Interrupt enabled when bit is "1". IE.1 ET0 Interrupt control bit for timer interrupt 0. Interrupt disabled when bit is "0". Interrupt enabled when bit is "1". IE.2 EX1 Interrupt control bit for external interrupt 1. Interrupt disabled when bit is
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MSM80C154S/83C154S ¡ Semiconductor Interrupt priority register (IP) MSB LSB NAME ADDRESS 76543210 IP 0B8H PCT — PT2 PS PT1 PX1 PT0 PX0 BIT LOCATION FLAG FUNCTION IP.0 PX0 Interrupt priority bit for external interrupt 0. Priority is assigned when bit is "1". IP.1 PT0 Interrupt priority bit for timer interrupt 0. Priority is assigned when bit is "1". IP.2 PX1 Interrupt priority bit for external interrupt 1. Priority is assigned when bit is "1". IP.3 PT1 Interrupt priority bit for timer interrupt 1
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¡ Semiconductor MSM80C154S/83C154S Program status word register (PSW) MSB LSB NAME ADDRESS 76543210 PSW 0D0H CY AC F0 RS1 RS0 OV F1 P BIT LOCATION FLAG FUNCTION PSW.0 P Accumulator (ACC) parity indicator. This bit is "1" when the "1" bit number in the accumulator is an odd number, and "0" when an even number. PSW.1 F1 User flag which may be set to "0" or "1" as desired by the user. PSW.2 OV Overflow flag which is set if the carry C6 from bit 6 of the ALU or CY is "1" as a result of an arithmet
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MSM80C154S/83C154S ¡ Semiconductor I/O control register (IOCON) MSB LSB NAME ADDRESS 76543210 IOCON 0F8H — T32 SERR IZC P3HZ P2HZ P1HZ ALF BIT LOCATION FLAG FUNCTION IOCON.0 ALF If CPU power down mode (PD, HPD) is activated with this bit set to "1", the outputs from ports 0, 1, 2, and 3 are switched to floating status. When this bit is "0", ports 0, 1, 2, and 3 are in output mode. IOCON.1 P1HZ Port 1 becomes a high impedance input port when this bit is "1". IOCON.2 P2HZ Port 2 becomes a high im
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¡ Semiconductor MSM80C154S/83C154S Timer 2 control register (T2CON) MSB LSB NAME ADDRESS 76543210 T2CON 0C8H TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2 CP/RL2 BIT LOCATION FLAG FUNCTION T2CON.0 CP/RL2 Capture mode is set when TCLK + RCLK = "0" and CP/RL2 = "1". 16-bit auto reload mode is set when TCLK + RCLK = "0" and CP/RL2 = "0". CP/RL2 is ignored when TCLK + RCLK = "1". T2CON.1 C/T2 Timer/counter 2 count clock designation control bit. The internal clocks (XTAL1•2 ÷ 12, XTAL1•2 ÷ 2) are used when this
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MSM80C154S/83C154S ¡ Semiconductor MEMORY MAPS Program Area 65535 0FFFFH Timer interrupt 2 start 43 002BH S I/O interrupt start 35 0023H Timer interrupt 1 start 27 001BH External interrupt 1 start 19 0013H 16384 4000H 16383 3FFFH Timer interrupt 0 start 11 000BH 44 002CH 43 002BH External interrupt 0 start 3 0003H 2 0002H 1 0001H 0 7 6 5 4 3 2 1 0 CPU reset start 0 0000H 278 MSM80C154S EXTERNAL ROM AREA MSM83C154S INTERNAL ROM AREA MSM83C154S EXTERNAL ROM AREA
