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Implementation
Guide
August 2000 PCI Bus Solutions
SCPU007
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IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infri
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Notational Conventions Preface Read This First About This Manual This manual is intended to assist the designer who is attempting to implement a solution using the PCI4450 or PCI4451. Much, but not all, of the information contained herein can also be found elsewhere. However, the smaller size of this manual, as well as its organization by topics of primary interest to the hardware designer, make it a much more usable source regarding those problems most likely to be encountered in the design pr
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Contents enter from items that the system displays (such as prompts, command output, error messages, etc.). Here is a sample program listing: 0011 0005 0001 .field 1, 2 0012 0005 0003 .field 3, 4 0013 0005 0006 .field 6, 3 0014 0006 .even Here is an example of a system prompt and a command that you might enter: C: csr –a /user/ti/simuboard/utilities In syntax descriptions, the instruction, command, or directive is in a bold typeface font an
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Trademarks This syntax shows that .byte must have at least one value parameter, but you have the option of supplying additional value parameters, separated by commas. Related Documentation From Texas Instruments PCI4450 GFN/GJG PC Card and OHCI Controller Data Sheet, SCPS046 PCI4451 GFN/GJG PC Card and OHCI Controller Data Manual, SCPS054 OHCI.Lynx Configuration Information Application Report, SLLA077 PHY Layout Recommendations Application Report, SLLA020A TSB41LV03A Data Sheet, SLLS364 http://
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Contents Contents 1 PCI445X Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1 1.1 System Features Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1.1.1 Package Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1.1.2 G_RST and PRST . . . . . . . . . . . . . . . . . . . . . .
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Contents A Global Reset Only Bits, PME Context Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1 A.1 Global Reset Only Bits/PME Context Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2 B PME and RI Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1 B.1 PME and RI Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Contents Figures 1–1 Typical System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1–2 Serialized Interrupt Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 1–3 EEPROM 2-Wire Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10 1–4 TPS22X6 Power Switch Interface . . . . . . . . . . . . .
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Contents Tables 1–1 Registers and Bits Loadable Through Serial EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11 1–2 PC Card Interface Pullup Register List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16 1–3 PCI Bus Interface Pullup Register List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-17 1–4 Miscellaneous Terminals Pullup Register List . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Chapter 1 PCI445X Device This implementation guide assists platform hardware developers designing with the PCI445X dual socket PC card and 1394 open host controller interface (OHCI) link layer controller (LLC). The PCI445X designation refers to any device in the PCI445X family, for example, the PCI4450 or PCI4451 device. The document includes an overview of the PCI445X function and features, terminal assignments and pinout illustrations, PCI445X I/O electrical characteristics, identification o
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Figure 1–1 illustrates a platform using the PCI445X device along with the TSB41LV03 3-port PHY, which provides the necessary interface to implement a 3-port IEEE1394 node. Figure 1–1. Typical System Architecture North CPU Memory Bridge PCI Bus 19 South Sound Graphics PCI445X Bridge Controller Controller ZV Socket Power 4 Power Audio 14 Switch Codec PC Card 2 EEPROM Interrupt / PME / RI TSB41LV03A PHY 1-2
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System Features Selection 1.1 System Features Selection This section explains selectable system features. Feature selection is required for GPIO and MFUNC terminal assignments and PCI445X register initialization. Detailed system implementation methods are described in the following sections. All functions cannot necessarily be used at the same time, because of the limitations of programmable multifunction terminals (i.e., MFUNC7–MFUNC0). 1.1.1 Package Types The Texas Instruments PCI445X device i
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System Features Selection automatically assigned on the dedicated SDA and SCL terminals. A pullup resistor (typically 10 kW) must be added on SDA and SCL when using an EEPROM. The value of the pullup resistor can vary for different EEPROMs. Refer to the EEPROM data sheet or contact the manufacturer for the recommended pullup resistor value. 1.1.6 PCI and ISA Style Interrupt The PCI445X device provides three modes of interrupt signaling: Parallel PCI interrupts only Parallel PCI interrupts an
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System Features Selection 1.1.10 Socket Activity LEDs Socket activity signals can be assigned on MFUNC4 (slot 1), MFUNC3 (slot 2), MFUNC5 (OHCI_LED), MFUNC6 (OHCI_LED), and MFUNC7 (OHCI_LED). 1.1.11 MFUNC7–MFUNC0 Terminal Assignments After selecting required functions for the system, multifunction terminals MFUNC7–MFUNC0 are ready to be assigned. Texas Instruments offers Windows-based software, named TIROUTE.EXE, to assist with terminal assignment. 1.1.12 Miscellaneous Functions Description 1.1.
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System Features Selection 1.1.12.3 Asynchronous CSC Interrupt Generation The ASYNC_CSC bit (diagnostic register, PCI offset 93h, bit 0) controls the CSC interrupt signaling method. If this bit is set to 0, then CSC is generated synchronously to PCLK (recommended). By default this bit is set to 1, which is the asynchronous mode. 1.1.12.4 CardBus Reserved Terminal Signaling The CardBus interface has reserved terminals. Usually the CardBus controller drives these terminals low. If the CBRSVD bit (s
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System Features Selection CCLK can be slowed down rather than stopped by CCLKRUN. If CCLKRUN is set, the CLKCTRLEN (CardBus socket 20h, bit 16) and CLKCTR (CardBus socket 20h, bit 0) bits are both set to 1. The clock is slowed down to 1/16. In this mode the PCI clock is not allowed to stop. 1.1.12.9 SMI A PC card power change event can be reported to the system as SMI (IRQ2 or CSC). It can be controlled with the SMIROUTE, SMISTATUS, and SMIENB bits (system control register, PCI offset 80h, bits
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System Implementation 1.2 System Implementation This section describes signal connection for each interface, PCI bus, PC card 2 2 interface, I C interface, P C interface, ZV interface, interrupt interface (parallel and serial), miscellaneous signals, and the PHY-Link interface. It also explains pullup/pulldown resistor requirements. 1.2.1 Clamping Rails The PCI445X device has three clamping rails: V , V , and V . V CCA CCB CCP CCA and V are not power supplies for PC cards. After a card is powere
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System Implementation IDSEL, there is no alternative. If another AD line is to be used for IDSEL, then the system designer must leave the pullup off LATCH and use MFUNC7 to route IDSEL. Also, if AD23 is used, then the resistive coupling should not be used. Refer to the Implementation Note: System Generation of IDSEL in the PCI Local Bus Specification, Revision 2.2 (section 3.2.2.3.5). PCI Local Bus Specification, Revision 2.2 (section 4.2.6, footnote 31) recommends resistive coupling. A 100-W re
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System Implementation 1.2.3 PC Card Interface The PC Card interface has two modes: the 16-bit interface mode and the CardBus 32-bit interface mode. Damping resistor on CCLK terminal A series-damping resistor is recommended on the CCLK signal. The damping resistor is system dependent. If line impedance is in the 60 – 90-W range, a 47-W resistor is recommended (see PC Card Standard, Revision 7). CD line filtering PCI445X device has the advanced CDx line filtering circuit. It provides 90 m s of
