ページ1に含まれる内容の要旨
SY-7ISA+
Motherboard
FC-PGA Socket 370 Processor supported
815E AGP/PCI/CNR
66/100/133 MHz Front Side Bus supported
User's Manual
****************************************************
ATX Form Factor
****************************************************
ページ2に含まれる内容の要旨
O ™ Copyright © Customers "http://www.soyo.com.tw". C FC ersion 1.1 V POST CONSUMER RECYCLED PAPER 100% ii 7ISA+ SERIAL FOR HOME OR OFFICE USE With FCC Standards Edition: October 2000 Tested To Comply on the Internet. The address is Web Site For further information, please visit our notice. guarantee given. The information in this document is subject to amend without checked for reliability; however, to the correctness of the contents there is no and installing the Motherboard. Information i
ページ3に含まれる内容の要旨
T ................................ ... 1 1-1 ................................ ............................ 1 1-2 .............................. 3 1-3 A ......... 3 1-4 .......................... 4 1-5 ............... 5 1-6 ................................ ................................ ......... 7 1-7 ................................ .. 14 1-8 ................................ ............... 16 1-9 ................................ .. 16 A W ................................ ....... 17 2-1 .....
ページ4に含まれる内容の要旨
T 3-5 A ................................ ..... 69 3-6 ................................ 74 3-7 A ............................. 78 3-8 ................................ .................... 81 3-9 ................................ ..... 83 3-10 ................................ ... 84 ................................ ........... 85 3-12 ................................ ........................ 86 3-13 ................................ ..... 87 A ................................ ............ 89 A A ...
ページ5に含まれる内容の要旨
MOTHEBOARD DESCRIPTION 1-1 Ø The A y l ® FC-PGA ™ m ® III (500E-850MHz) m ® III (533-1.13GHz) Ø Ø Ø Ø Ø Supports W Ø Ø Ø Ø Ø Ø r ™ utility Ø Ø “ ” Ø 1 -4MB max addressable -133MHz SDRAM interface only AGP interface Support display cache interface (AIMM card) multiplexed on the SOYO COMBO Setup Easy CPU settings in BIOS with the Fan speed control Docto Supports onboard hardware monitoring and includes Hardware Supports Suspend to RAM Power failure resume Power-on by modem, alarm
ページ6に含まれる内容の要旨
Ø Ø Ø Ø Ø ( ) ( Ø Ø Ø Ø Ø Ø A * If the user wants to use a Modem Riser card (MR) make sure to use a Secondary mode MR, PRIMARY mode MRs are NOT Supported. 2 TX power connector 1 x IrDA port 4 x USB ports onboard 6 x 32-bit bus master PCI slots 1 x 32-bit AGP slot 3 x DIMM slots for SDRAM memory - Supports Smart Card insertion power-on feature - Supports card present detect ISO 7816) protocols - Compliant with smart card Group standard Working PC/SC - Compliant with Personal Computer
ページ7に含まれる内容の要旨
1-2 HANDLING THE MOTHERBOARD Ø Ø Ø . y 1-3 Ø Ø Ø Ø 3 components. Handle the Motherboard by its edges and avoid touching its Frequently ground yourself while working or use a grounding strap. slot covers or other unpainted portions of the computer chassis.) protective anti-static packaging. (To ground yourself, grasp the expansion Ground yourself before removing any system component from its Do not remove the anti-static packaging until you are ready to install. precautions: To protect y
ページ8に含まれる内容の要旨
1-4 SY-7ISA+ MOTHERBOARD L B ee r Connector 31 r JP1 13 11 JP34 33 JP6 JP7 1 2 CJ1 CJ2 1 1 22 T A 21 A JOYSTICK 1 CPUFAN 3 T N AGP Slot K 1 2 3 M M M 1 4 M M M CDIN1 I I I D D D 1 l l 2 3 WOL Header E IT8712F-A CMOS Clear 4 Jumper 1 13 r Reset LED JP33 Keylock 1 5 3V 2 m Lithiu JP9 Speaker Battery 6 2 10 SYSFAN 1 224 1 1 5 3 1 1 1 9 CNR1 JP8 SIRCON SMCARDCN 4 SY-7ISA+ Platform Back Panel USB3_4 JP22 PCI# LED HDD LED STR PCI# PWRBT Powe PCI# JP5 IT PCI# JP10 PCI# STAC9721 Inte Sigmate FDC1 PC
ページ9に含まれる内容の要旨
1-5 ABC D EF G H I G A J F A E A K D A L M N O P Q C A B A A A Z YXV UTS R 5 SY-7ISA+ MOTHERBOARD COMPONENTS SY-7ISA+ Motherboard Description
ページ10に含まれる内容の要旨
A B C D E F G H I J K L M N O P Q R S T U V W X ’ Y Z AB AG 6 Back panel Connectors CPU Cooling Fan Connector AF CD-IN Connector AE AC97 Codec Chip AD ITE IT8712F-A Chip AC Communication Networking Riser Slot CNR MR Card-CODEC OPTION Setting Jumper AA Smart Card Reader Connector 32-bit PCI Mastering Slots s language Jumper Voice Doctor System Fan Connector 3V Lithium Battery Serial Infrared (IrDA) Device Header FWH Boot Block Write-Protect Setting Jumper USB Connector Intel 82802AB 4MB FWH SPEAK
ページ11に含まれる内容の要旨
1-6 ® l ® 815E GMCH), an I/O l . array l l ® l ® 815E Chipset System l l ® ’ l l l l 7 Integrated System Management Controller ICH2 supports up to 6 PCI/Req/Gnt pairs operations PCI Rev2.2 compliant with support for 33MHz PCI 82801BA(ICH2) functions and capabilities include: dedicated hub interface. ® 815E GMCH and ICH2 communicate over a platforms. The Inte s PC PCI Bus and integrates many of the functions needed in today multifunctional I/O Controller Hub that provides the interface to t
ページ12に含まれる内容の要旨
l l – l l ’ l l l l l l Intel ® 815E GMCH Overview l l l l l l l l l l l l l l ® Celeron ™ l ® 815E GMCH l 8 queue(i.e., supports pipelining of up to 4 outstanding transaction ® 815E GMCH supports a 4-deep in-order a single device. The Inte implements the host address, control, and data bus interfaces within Processor in the FC-PGA package. The Inte ® Pentium III processor and Inte support the Inte ® 815E GMCH is optimized to The host interface of the Inte Host Interface 1-6
ページ13に含まれる内容の要旨
l y l . The Inte y l l y l l l l , the y l l y . memory 9 the SDRAM. SCKE[4:0] is used in configurations requiring powerdown mode for within the memory arra . Pages can be kept open in any one bank of ® 815E GMCH can be configured to keep up to 4 page op[en Inte ® 815E GMCH also provides a 1024 deep refresh queue. The Inte supports both single and double-sided DIMMs. Additionall ® 815E GMCH targets SDRAM with CL2 and CL3 and The Inte loading), enabling the support of up to six 64-bit rows of S
ページ14に含まれる内容の要旨
l l ® l ® 815E GMCH 1) – 2) – 1.5V 3.3V y 10 interface to AGP are allowed. No transactions from AGP to the hub priority accesses are supported. Only memory writes form the hub mechanism must be selected during system initialization. High but not both simultaneousl . Either the PIPE# or the SBA[7:0] The GMCH supports PIPE# or SBA[7:0] AGP address mechanisms, bus. AGP FRAME# cycles to SDRAM are snooped on the host bus. (PIPE# or SBA[7:0]) cycles to SDRAM are not snooped on the host The AGP int
ページ15に含まれる内容の要旨
l l l l l l y y The hub interface is a private interconnect between the Intel® 815E Intel l l ® 11 Gouraud shading, alpha-blending, fogging and Z-buffering. A rich correct texture mapping, trilinear and anisotropic Mip-Map filtering, 815E GMCH graphics accelerator engine supports perspective- different primitives or portions of the same primitive. The Inte which allow each pipeline stage to simultaneously operate on performance via per-pixel 3D rendering and parallel data paths pipel
ページ16に含まれる内容の要旨
l . y l ’ l ® 815E GMCH 12 compensation for software-assisted DVD video playback. integrated graphics accelerator also supports full MPEG-2 motion In addition to its 2D/3D capabilities, the Inte hardware acceleration for many common Windows operations. instructions. The high performance 64-bit BitBLT engine provides hardware cursor and an extensive set of 2D registers and capabilities include BLT and arithmetic STRB LT engines, a s 2D ® 815E GMCH integrated graphics accelerator The Inte the Z-bu
ページ17に含まれる内容の要旨
’ ’ s ¿ “ B ” “ 13 recognize it as both the A and B drive boot: device, the system will When the LS-120 drive is configured as the drive, the standard diskette drive is not seen by the operating system. the :boot: drive and configure a standard 3.5-inch diskette drive as a If you connect a LS-120 drive to an IDE connector and configure it as Note as Drive A in the BIOS setup program. allowed. The LS-120 drive can be configured as a boot device if selected Connection of an LS-120 drive and a
ページ18に含まれる内容の要旨
1-7 l l l l l l l Ø Ø Serial Parallel l l l P . y l Diskette 14 controller and supports both PC-AT and PS/2 modes. In the Setup The I/O controller is software compatible with the 82077 diskette drive Drive Controller 1-7.3 Bi-directional high-speed ECP required for operation. See Section 6.2 for EPP compatibilit Bi-directional EP . A driver from the peripheral manufacturer is Bi-directional (PS/2 compatible) Compatible (standard mode) program, there are four options for par
ページ19に含まれる内容の要旨
l l l l l l PS/2 ¿ . r ’ Infrared 15 like laptops, PDAs, and printers. The IR connection can be used to transfer files to or from portable devices Support 1-7.5 running the Power On Self Test (POST). s software by jumping to the beginning of the BIOS code and computer , software reset. This key sequence resets the The keyboard controller also supports the hot-key sequence BIOS Setup program. password protection. Power On/Reset password can be specified in the keyboard
ページ20に含まれる内容の要旨
1-8 Ø Ø Ø 1-9 WAKE ON LAN TECHNOLOGY W W * W W 16 supply. standby current when implementing ake on LAN can damage the power capable of delivering +5V ±5 % at 720 mA. Failure to provide adequate For ake on LAN, the 5-V standby line for the power supply must be CAUTION technology connector. that powers up the computer. To access this feature uses the ake on LAN interface; upon detecting a Magic Packet, the NIC asserts a wakeup signal LAN technology connector. The NIC monitors network traffic