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5EAS5
P54C/P55C PCI Mainboard
User’s Guide &
Technical Reference
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TM SOYO About This Guide T h i s U s e r ’ s G u i d e i s f o r a s s i s t i n g s y s t e m m a n u f a c t u r e r s a n d e n d u s e r s i n s e t t i n g u p a n d i n s t a l l i n g t h e m a i n b o a r d . I n f o r m a t i o n i n t h i s g u i d e h a s b e e n c a r e f u l l y c h e c k e d f o r r e l i a b i l i t y ; h o w e v e r ,
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Table of Contents Chapter 1: Introduction… … … .… … … … ..… .… … … ..1 K e y F e a t u r e s … … … … … … … … … … … … . . … … … … … … … 1 U n p a c k i n g t h e M a i n b o a r d … … … … … … … … … … … … … 2 E l e c t r o s t a t i c D i s c h a r g e P r e c a u t i o n s … … … … … … … … … . 2 M a i n b o a r d L a y o u t W / D e f a u l t S e t t i n g s … … . . … … … … … … … 3 R e m a r k s o n t h e C y r i x a n d I B M P 2 0 0 C P U s … … . . … … … … . 5
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J 1 7 - K e y l o c k & P o w e r L E D C o n n e c t o r … … … … … … … … . . 1 6 I D E 1 / I D E 2 - O n b o a r d P r i m a r y / S e c o n d a r y I D E C o n n e c t o r s . 1 6 C N 1 - P S / 2 M o u s e C o n n e c t o r … … … … … … … … … … . . 1 6 P R T - P a r a l l e l P o r t C o n n e c t o r … … … … … … … … … … . . 1 6 A T P o w e r C o n n . - A T p o w e r s u p p l y c o n n e c t o r … … . . 1 6 J 2 3 : S l e e p S w i t
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1 Introduction The EQ82C661X PCI mainboard is a high-performance AT form-factor system board that supports P54C/P55C family CPUs. You can order 512K of external cache memory on the mainboard. The mainboard is fully compatible with industry standards, and adds many technical enhancements. Key Features ¥ CPU Ñ Supports P54C/P55C family CPUs running at 90~200 MHz + + speeds; Cyrix/IBM CPUs running at PR120 ~PR200 speeds; and AMD K5/K6 CPUs running at PR75 ~ PR233 speeds Ñ Two kinds of mainboards ar
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2 Introduction Unpacking the Mainboard The mainboard package contains: ¥ The EQ82C661X Mainboard ¥ This UserÕs Guide Note: Do not unpack the mainboard until you are ready to install it. Follow the precautions below while unpacking the mainboard. 1. Before handling the mainboard, ground yourself by grasping an unpainted portion of the systemÕs metal chassis. 2. Remove the mainboard from its anti-static packaging and place it on a grounded surface, component side up. 3. Check the mainboard for dam
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Introduction 3 Mainboard Layout w/ Default Settings 17 16 5 4 18 15 14 11 14 9 10 7 8 12 12 13 2 2 2 2 1 3 3 6 Figure 1Ð1. Mainboard Layout 1. ZIF socket 7 (for P54C/P55C) 10. SIMM Bank 2. EQ82C661X Chipset 11. Floppy Connector 3. Pipelined Burst SRAM 12. IDE1/IDE2 Connector 4. Super I/O Chip 13. Parallel Port Connector 5. PnP FLASH BIOS 14. COM1/COM2 Connector 6. TAG SRAM 15. AT Power Connector 7. ISA Slots 16. KB Connector 8. PCI Slots 17. PS/2 Mouse Connector 9. Unbuffered DIMM Bank 18. 3 V
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Introduction 4 D e f a u l t s e t t i n g s a r e a s f o l l o w s : P e n t i u m 1 3 3 M H z ( P 5 4 C ) C P U , 5 1 2 K P i p e l i n e d B u r s t c a c h e , O n - b o a r d P C I E - I D E E n a b l e d , 2 h i g h s p e e d U A R T S E n a b l e d ( w / 1 6 5 5 0 F I F O ) , 1 E P P / E C P p o r t ( E C P + E P P m o d e ) , 5 V D R A M / 3 . 3 V D I M M , a n d A T p o w e r s u p p l y . 1 1 CN1 CN2 ( P S / 2 U S B J 2 5 ( K B ) I R FLASH BIOS 1 J P 5 C N 5 1 EQ6619 J P 1 6 J P 1 2 J
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Introduction 5 + Remarks on the Cyrix and IBM P200 CPUs + P l e a s e n o t e t h a t i f y o u u s e a C y r i x o r I B M P 2 0 0 C P U , y o u w i l l h a v e t o s e t t h e f r e q u e n c y t o 7 5 M H z . Y o u w i l l a l s o h a v e t o s e t J P 1 6 , t h e P C I b u s f r e q u e n c y j u m p e r t o a s y n c h r o n o u s t o h a v e t h e P C I b u s r u n o n 3 2 M H z , i n o r d e r t o a v o i d p r o b l e m s w i t h a d d - o n c a r d s . I f
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2 Hardware Setup This chapter is designed for Normal edition mainboard use only and it explains how to configure the mainboardÕs hardware. After you install the mainboard, you can set jumpers, install memory on the mainboard, and make case connections. Refer to this chapter whenever you upgrade or reconfigure your system. CAUTION: Turn off power to the mainboard, system chassis, and peripheral devices before performing any work on the mainboard or system. Jumpers JP5: CMOS Clear Jumper Clear the
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Hardware Setup 7 JP16: PCI Bus Asynchronous/Synchronous Jumper Asynchronous and synchronous (default) PCI bus frequency settings are available. PCI Bus Setting JP16 1 Asychronous 1 Synchronous Divides the host bus by 2 to get the Asynchronous setting, and sets the PCI bus on 32MHz to get the synchronous setting. Set JP16 to Synchronous mode when the system is unstable. Host Bus PCI Bus Frequency PCI Bus Frequency (CPU Bus) (Synchronous) (Asynchronous) 50 MHz* 25 MHz 32 MHz 55 MHz* 27.5
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8 Hardware Setup CPU Type Configuration This section is designed for normal edition manboard use only and also shows you how to configure your CPU step by step. Note that you need to check the CPU voltage before installation. q Step 1: Frequency Setting Pentium – 75/90/100 CPU Settings (1.5 x clock) AMD K5 – PR75/PR90/PR100/PR120/PR133 (1.5 x clock) Pentium – 75/50 MHz AMD K5 – PR 75/50MHz 1 JP12 JP11 1 JP10 EQ6619 JP12 JP11 JP10 Pentium – 90/60 MHz AMD K5 – PR 90/60MHz AMD K5 – PR 120/60 M
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Hardware Setup 9 1 JP12 EQ6619 1 JP11 JP12 JP10 JP11 JP10 1 JP12 JP11 JP10 EQ6618 1 JP12 JP11 JP10 JP14 JP13 1 JP12 JP11 JP10 1 JP12 JP11 JP10 Figure 2-1-2. CPU Jumper Settings stability.
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10 Hardware Setup Pentium– 150/166 CPU Settings (2.5 x clock) AMD K5/K6 – PR166 CPU Setting 1 EQ6619 JP12 JP11 Pentium – 150/60 MHz JP10 1 JP12 JP11 JP10 EQ6618 586 Pentium – 166/66 MHz CPU AMD K5/K6 – PR166 1 Family JP12 JP14 JP11 JP10 JP13 Figure 2Ð1Ð3. CPU Jumper Settings Note: You must equip the CPU with a fan and heat sink for system stability. Pentium – 180/200 CPU Settings (3.0 x clock) AMD K6 – PR200 CPU Setting 1 EQ6619 JP12 JP11 Pentium – 180/60 MHz JP10 1 JP12 JP11 JP10 EQ6618 5
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Hardware Setup 11 1 JP12 JP11 JP10 JP14 JP13 F Fi ig gu ur re e 2 2- -1 1- -2 2.. C CP PU U J Ju um mp pe er r S Se et tt ti in ng gs s s st ta ab bi il li it ty y.. 1 JP12 JP11 JP10 JP14 JP15 JP13 Figure 2-1-3. CPU Jumper Settings stability.
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S i n g l e v o l t a g e C P U s u s e t h e s a m e v o l t a g e f o r b o t h V i o a n d V c o r e . T h e C P U s t h a t f a l l i n t o t h i s c a t e g o r y a r e : P 5 4 C X , A M D - K 5 a n d t h e C y r i x 6 x 8 6 . R e f e r t o t h e f o l l o w i n g f i g u r e s t o s e t t h e v o l t a g e f o r t h e s e C P U s : JP32 7 8 1 2 5 8 6 C P U JP31 F a m i l y 2 4 JP30 4 2 Figure 2-2-1. Single Voltage 3.3V CPU JP32 7 8 1 2 5 8 6 C P U JP31 F a m i l y 2 4 JP30 4 2 Figure 2-2-2
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D u a l v o l t a g e C P U s a r e d e s i g n e d t o u s e d i f f e r e n t v o l t a g e s f o r V i o a n d V c o r e . T h e y i n c l u d e P 5 5 C X a n d t h e C y r i x 6 x 8 6 L / 6 x 8 6 M X . R e f e r t o t h e f o l l o w i n g f i g u r e t o s e t t h e v o l t a g e f o r t h e s e C P U s : 3.2V CPU 2.9V CPU JP32 2.8V CPU 5 8 6 C P U JP31 F a m i l y 2 2.1V CPU 4 JP30 4 2 Figure 2-2-3 Dual Voltage CPU Note: Due to varying desings, please ask your dealer for the correct voltag
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1 . I n B a n k 1 2 . I n B a n k 2 3 . I n B a n k 1 & B a n k 2 4 . I n D I M M 5 . I n B a n k 2 & D I M M Cacheable Cache Size Cache RAM TAG RAM Range 512KB
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Hardware Setup 15 Multi I/O Port Addresses D e f a u l t s e t t i n g s f o r m u l t i I / O p o r t a d d r e s s e s a r e s h o w n i n t h e t a b l e b e l o w . Port I/O Address IRQ Status LPT1* 3 7 8 H 7 E C P + E P P COM1 3 F 8 H 4 COM2 2 F 8 H 3 I f d e f a u l t I / O p o r t a d d r e s s e s c o n f l i c t w i t h o t h e r I / O c a r d s ( e . g . s o u n d c a r d s o r I / O c a r d s ) , y o u m u s t a d j u s t o n e o f t h e I / O a d d r
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16 Hardware Setup CN5 - IR Connector A t t a c h a 5 - p i n i n f r a r e d d e v i c e c a b l e t o t h i s c o n n e c t o r f o r e n a b l i n g t h e i n f r a r e d t r a n s f e r f u n c t i o n . T h i s m a i n b o a r d m e e t s t h e s p e c i f i c a t i o n o f A S K I R a n d H P S I R . CN2 - Keyboard Connector A 5 - p i n f e m a l e D I N k e y b o a r d c o n n e c t o r i s l o c a t e d a t t h e r e a r o f t h e b o a
