ページ1に含まれる内容の要旨
CY7C107BN
CY7C1007BN
1M x 1 Static RAM
Features
Functional Description
The CY7C107BN and CY7C1007BN are high-performance
•High speed
CMOS static RAMs organized as 1,048,576 words by 1 bit.
—t = 15 ns
AA Easy memory expansion is provided by an active LOW Chip
Enable (CE) and three-state drivers. These devices have an
• CMOS for optimum speed/power
automatic power-down feature that reduces power
• Automatic power-down when deselected
consumption by more than 65% when deselected.
• TTL-compatibl
ページ2に含まれる内容の要旨
CY7C107BN CY7C1007BN Current into Outputs (LOW)......................................... 20 mA Maximum Ratings Static Discharge Voltage............................................ >2001V (Above which the useful life may be impaired. For user guide- (per MIL-STD-883, Method 3015) lines, not tested.) Latch-Up Current..................................................... >200 mA Storage Temperature ..................................-65°C to +150°C Ambient Temperature with Operating Range Power App
ページ3に含まれる内容の要旨
CY7C107BN CY7C1007BN AC Test Loads and Waveforms Ω R1 480 R1 480Ω 5V 5V ALL INPUT PULSES 3.0V OUTPUT OUTPUT 90% 90% 10% 10% GND R2 R2 30 pF 5pF 255Ω 255Ω ns ≤ 3 ns ≤ 3 INCLUDING INCLUDING JIG AND JIG AND SCOPE SCOPE (a) (b) Equivalentto: THÉ VENIN EQUIVALENT 167Ω OUTPUT 1.73V [5] Switching Characteristics Over the Operating Range 7C107BN-15 7C1007BN-15 Parameter Description Min. Max. Unit READ CYCLE t Read Cycle Time 15 ns RC t Address to Data Valid 15 ns AA t Data Hold from Address Change 3
ページ4に含まれる内容の要旨
CY7C107BN CY7C1007BN Switching Waveforms [10, 11] Read Cycle No. 1 t RC ADDRESS t AA t OHA PREVIOUS DATA VALID DATA VALID DATA OUT [11, 12] Read Cycle No. 2 ADDRESS t RC CE t ACE t t HZCE LZCE HIGH IMPEDANCE HIGH IMPEDANCE DATA OUT DATA VALID t PD t PU V CC I CC SUPPLY 50% 50% CURRENT I SB [13] Write Cycle No. 1 (CE Controlled) t WC ADDRESS t SA t SCE CE t t HA AW t PWE WE t t HD SD DATA IN DATA VALID HIGH IMPEDANCE DATA OUT Notes: 9. No input may exceed V + 0.5V. CC 10. Device is continuousl
ページ5に含まれる内容の要旨
CY7C107BN CY7C1007BN Switching Waveforms (continued) [13] Write Cycle No. 2 (WE Controlled) t WC ADDRESS t SCE CE t t AW HA t t SA PWE WE t t SD HD DATA IN DATA VALID t t HZWE LZWE HIGH IMPEDANCE DATA OUT DATA UNDEFINED Truth Table CE WE D Mode Power OUT H X High Z Power-Down Standby (I ) SB L H Data Out Read Active (I ) CC L L High Z Write Active (I ) CC Ordering Information Speed Package Operating (ns) Ordering Code Diagram Package Type Range 15 CY7C107BN-15VC 51-85032 28-Lead (400-Mil) Mold
ページ6に含まれる内容の要旨
CY7C107BN CY7C1007BN Package Diagrams 28-Lead (400-Mil) Molded SOJ (51-85032) PIN 1 I.D 14 1 MIN. DIMENSIONS IN INCHES .435 MAX. .445 .395 .405 15 28 .720 .730 SEATING PLANE .128 .148 .007 .013 0.004 .026 .360 .050 .032 .380 TYP. .025 MIN. .015 .020 51-85032.*B 51-85032-*B 28-Lead (300-Mil) Molded SOJ (51-85031) NOTE : 1. JEDEC STD REF MO088 2. BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.006 in (0.152 mm) PER SIDE MIN. 3. DIMENS
ページ7に含まれる内容の要旨
CY7C107BN CY7C1007BN Document History Page Document Title: CY7C107BN/CY7C1007BN 1M x 1 Static RAM Document Number: 001-06426 Issue Orig. of REV. ECN NO. Date Change Description of Change ** 423847 See ECN NXR New Data Sheet Document #: 001-06426 Rev. ** Page 7 of 7 [+] Feedback
