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Cost Effective
Network Processor
for TCP/IP
with ARM7TDMI
MLN7400
Evaluation Board Manual
Version 0.20
December 31, 2003
MCS Logic Inc.
Copyright © 2003 MCS LOGIC Limited. All rights reserved EVB7400
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EVB7400 Revision History Version Date Revision Description V 0.10 December 30, 2003 First Release User’s Manual V.0.10 2/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved
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EVB7400 User’s Manual V.0.10 3/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved
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EVB7400 Table of Contents CHAPTER 1 INTRODUCTION.................................................................................................................. 6 1.1 SYSTEM REQUIREMENTS............................................................................................................................................ 6 1.2 BOARD COMPONENTS ..........................................................
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EVB7400 List of Figures [FIGURE 1 ] EVB7400 BLOCK DIAGRAM....................................................................................................................... 6 [FIGURE 2 ] MEMORY MAP .......................................................................................................................................... 7 [FIGURE 3 ] BLOCK DIAGRAM (TOP VIEW) .............................
ページ6に含まれる内容の要旨
EVB7400 Chapter 1 Introduction EVB7400 is a MLN7400 evaluation board and MCS-uClinux training kit that is suitable for code development and exploration of MN7400 with MCS-uClinux. It includes much of the hardware and software required completing your application development. It supports various function related with network, communication such as IIC, SPI, UART, 10/100 Ethernet, multimedia module such a
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EVB7400 ADDRESS MLN7400 MAP EVB7400 0x000_0000 ~ 0x0FF_FFFF ROM/Flash bank 0 (16Mbytes) FLASH(512KB) 0x100_0000 ~ 0x1FF_FFFF ROM/Flash bank 1 (16Mbytes) SRAM(128KB) 0x200_0000 ~ 0x2FF_FFFF ROM/Flash bank 2 (16Mbytes) FLASH(2MB) 0x300_0000 ~ 0x3FF_FFFF ROM/Flash bank 3 (16Mbytes) PCMCIA Card 0x400_0000 ~ 0x5FF_FFFF Cacheable SDRAM area (32Mbytes) SDRAM 64Mbits(8Mbytes) 0x600_0000 ~ 0x600_5FFF (Cacheable)
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EVB7400 1.2 Board Components The arrangement of major components on the board is shown in Figure 3. The major components include: [Figure 3 ] BLOCK DIAGRAM (TOP VIEW) User’s Manual V.0.10 8/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved
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EVB7400 A Flash ROM There is a socket(U9) which accept 512Kbyte size of 8 bit Flash Memory(AT29C010 ~ 40). This is for diaganostic program(includes all pheriperal device driver and TCP/IP protocol stack) and BIOS(MCS-uClinux Boot loader) program. User Flash memory(Selectable Boot ROM) A mounted 48 TSOP type flash(AM29LV160BB), U8, is mounted for saving MCS-uClinux image. It has 2Mbytes(1M x 16bits)size.
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EVB7400 Four buttons(SW5, SW8, SW11, SW14) are connected to ADIN1(ADC channel 1). Three buttons(SW5, SW8, SW11, SW14) are connected to ADIN2(ADC channel 2). External Interrrupt Key There are two button to use external interrupts. Each button(S1,S2) is connected to External interrupt0 and 2. External Timer0 Clock Timer0 can be supplied by the external clock(ocsillator) User’s Manual V.0.10
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EVB7400 Chapter 2 Board Configuration The EVB7400 is set with default configuration. You can use the board with the defualt settings direclty. However, you can also change the settings according to your nedds. 2.1 Endian Selection (SW1) Status Description BIG BIG Endian LITTLE BIG Little Endian LITTLE 2.2 Boot ROM and ROM Bank0 length Selection (SW2) Status Description X8 ROM BANK0 Size is 8
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EVB7400 2.4 GPIO Setting <128-TQFP/ 144 -LQFP Common I/O> <144 -LQFP Extended I/O> Setting Setting PIN Shared Initial Board Setting Value PIN Shared Initial Board Setting Value GP00 CUTXD1 N,I UART1 S, O GP27 EXT_TCLK0 N,I Ext Timer0 Clk S, I GP01 CURXD1 N,I UART1 S, O GP28 EXT_TCLK1 N,I LED 2 N, O GP02 CUTXD2 N,I UART2 S, O GP29 EXT_TCLK2 N,I LED 3 N, O GP03 CURXD2 N,I UART2 S, O GP30 HUARTnDCD4 N
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EVB7400 Chapter 3 Setup EVB7400 Environments 3.1 Ethernet 10/100 BASE-T Connector Same connector and pin for both 10Base-T and 100 Base-Tx < At the network interface card/hubs > < At the cables > RJ45 female connetor at the network interface cards and hubs RJ45 male connector at the cable Pin Name Descriptions 1 TX+ Tranmit Data+ 2 TX- Tranmit Data- 3 RX+ Receive Data+ 4 N/C Not Connect
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EVB7400 [Figure 4 ] UTP CABLE CONNECTION User’s Manual V.0.10 14/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved
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EVB7400 Chapter 4 Connection Configurations for Debug Console 4.1 Configuration the Hyper Terminal To configure the Hyper Terminal, which is a Windows utility program for serial communications, refer to following steps: 1. Run the Hyper Terminal program -. Window 95/98/2000/XP start tool bar -> Program -> Accessories -> Hyper Terminal Group -> Double click Hyperterm.exe -> Enter a connection name ->
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EVB7400 [Figure 6 ] CHOOSE SETTING PAGE 6. Re-connect Hyper Terminal to run at new properties Disconnect : Call -> Disconnect Connect: Call -> Call 7. Power-On Reset or push the reset button on EVB7400 board Now, the diagnostic program menu is showed on the Hyper Terminal 4.2 Downloading Binary Image and Flash Write 4.2.1 Downloading Binary Image You can download a binary image file through the seria
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EVB7400 2. Type “8” at Flash Program Menu and type address to download. User’s Manual V.0.10 17/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved
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EVB7400 3. select the Send File from the Transfer menu File Name : Select the file name, which you want too download. Protocol : Select the Xmodem or 1K Xmodem. 4. Click Ok. Then, the file that you selected will be downloaded. User’s Manual V.0.10 18/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved
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EVB7400 4.2.2 Flash Write You can write downloaded binary image at User flash memory(AM29LV160BB, U8). Type “2” to write an executable binary file at User Flash memory. Then, you can execute your image by changing Boot Rom selection switch(SW2) to X16(default is X8). User’s Manual V.0.10 19/36 Copyright © 2004 MCS LOGIC Limited. All
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EVB7400 Chapter 5 Opennice32 Installation 5.1 OPENice32 The OPENice32 can also be connected with the EVB7400 as a debugging system for software applications development. OPENice32 is a JTAG-based, nonintrusive, debugging system for ARM-based controllers or processors. JTAG provides the interface between a debugger and the ARM-based controller development board. To use the OPENice32, the following additi
