ページ1に含まれる内容の要旨
MQ372-02
Application Manual
Real Time Clock Module
RX-8581SA/JE/NB
Model Product Number
RX-8581SA Q4185815xxxxx00
RX-8581JE Q4185817xxxxx00
RX-8581NB Q4185819xxxxx00
ページ2に含まれる内容の要旨
In pursuit of "Saving" Technology ,Epson electronic device. Our Lineup of semiconductors, Liquid crystal displays and quartz devices assists in creating the products of our customers' dreams. Epson IS energy savings. NOTICE • The material is subject to change without notice. • Any part of this material may not be reproduced or duplicated in any form or any means w
ページ3に含まれる内容の要旨
RX - 8581 SA / JE / NB Contents 1. Overview...................................................................................................................1 2. Block Diagram........................................................................................................1 3. Terminal description.............................................................................................2 3.1. Terminal connections ..................................
ページ4に含まれる内容の要旨
RX - 8581 SA / JE / NB 2 I C-Bus Interface Real-time Clock Module RX - 8581 SA / JE / NB • Features built-in 32.768-kHz crystal oscillator, frequency adjusted 2 • Supports I C-Bus's high speed mode (400 kHz) • Alarm interrupt function for day, date, hour, and minute settings • Fixed-cycle timer interrupt function (Seconds, minutes) • Time update interrupt function (FOE and FOUT pins) • 32.768-kHz output with OE function
ページ5に含まれる内容の要旨
RX - 8581 SA / JE / NB 3. Terminal description 3.1. Terminal connections RX - 8581 SA RX - 8581 JE RX - 8581 NB SOP − 14 pin VSOJ − 20 pin SON − 22 pin # 1 # 14 # 1 # 14 # 1 # 14 (#12) # 11 # 10 # 11 # 7 # 8 No. Pin terminal No. Pin terminal No. Pin terminal No. Pin terminal No. Pin terminal No. Pin terminal 1 N.C. 14 FOUT 1N.C. 20N.C. 1 / INT 22 N.C. 2 SCL 13 N.C. 2
ページ6に含まれる内容の要旨
RX - 8581 SA / JE / NB 4. Absolute Maximum Ratings GND = 0 V Item Symbol Condition Rating Unit Supply voltage VDD Between VDD and GND to +7.0 V −0.3 Input voltage (1) VIN1 FOE pin GND−0.3 to VDD+0.3 V Input voltage (2) VIN2 SCL and SDA pins GND−0.3 to +8.0 V Output voltage (1) VOUT1 FOUT pin to VDD+0.3 V GND−0.3 Output voltage (2) VOUT2 SDA and /INT pins to +8.0 V GND−0.3 When stored separately, Storage temperature TSTG to +125 −55 °C without packag
ページ7に含まれる内容の要旨
RX - 8581 SA / JE / NB * Unless otherwise specified, 7.2. AC Characteristics GND = 0 V , VDD = 1.8 V to 5.5 V , Ta = −40 °C to +85 °C Item Symbol Condition Min. Typ. Max. Unit SCL clock frequency fSCL 400 kHz Start condition setup time tSU;STA 0.6 µ s Start condition hold time tHD;STA 0.6 µ s Data setup time tSU;DAT 100 ns Data hold time tHD;DAT 0 ns Stop condition setup time tSU;STO 0.6 µ s Bus idle time between tBUF 1.3 µ s star
ページ8に含まれる内容の要旨
RX - 8581 SA / JE / NB 8. Use Methods 8.1. Overview of Functions 1) Clock functions This function is used to set and read out month, day, hour, date, minute, second, and year (last two digits) data. Any (two-digit) year that is a multiple of 4 is treated as a leap year and calculated automatically as such until the year 2099. ∗ For details, see "8.2. Description of Registers". 2) Fixed-cycle interrupt generation function The fixed-cycle timer i
ページ9に含まれる内容の要旨
RX - 8581 SA / JE / NB 8.2. Description of Registers 8.2.1. Register table Remark Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ! 0 SEC 40 20 10 8 4 2 1 ∗3 ! 1 MIN 40 20 10 8 4 2 1 ∗3 ! ! 2 HOUR 20 10 8 4 2 1 ∗3 ! 3 WEEK 6 5 4 3 2 1 0 ∗3 ! ! 4 DAY 20 10 8 4 2 1 ∗3 ! ! ! 5 MONTH 10 8 4 2 1 ∗3 6 YEAR 80 40 20 10 8 4 2 1 − ∗4 7 RAM • • • • • • • • 8 MIN Alarm AE 40 20 10 8 4 2 1 − 9 HOUR Alarm AE • 20 10 8 4 2 1 ∗4 WEEK Alar
ページ10に含まれる内容の要旨
RX - 8581 SA / JE / NB 8.2.2. Control register (Reg F) Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ! ! ! Control Register UIE TIE AIE STOP RESET F (Default) (0) (0) (−) (−) (−) (0) (−) (−) ∗1) The default value is the value that is read (or is set internally) after powering up from 0 V. ∗2) "o" indicates write-protected bits. A zero is always read from these bits. ∗3) "−" indicates no default value has been defined. • This register
ページ11に含まれる内容の要旨
RX - 8581 SA / JE / NB 4) STOP bit This bit is used to stop functions related to the RTC's internal counter operations. Writing a "1" to this bit stops the counter operations. Writing a "0" to this bit cancels stop status (restarts operations). ∗ For optimum performance, do not use this bit for functions other than the clock and calendar functions. STOP Data Description [Normal operation mode] This bit is used to cancel stop status for (i.e., restart) t
ページ12に含まれる内容の要旨
RX - 8581 SA / JE / NB 8.2.3. Flag register (Reg-E) Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ! ! ! ! Flag register UF TF AF VLF E (Default) (0) (0) (0) (1) (0) (−) (−) (−) ∗1) The default value is the value that is read (or is set internally) after powering up from 0 V. ∗2) "o" indicates write-protected bits. A zero is always read from these bits. ∗3) "−" indicates a default value is undefined. • This register is used to de
ページ13に含まれる内容の要旨
RX - 8581 SA / JE / NB 8.2.4. Extension register (Reg-D) Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ! ! Extension Register TEST WADA USEL TE TSEL1 TSEL0 D (Default) (0) (0) (0) (−) (−) (−) (−) (−) ∗1) The default value is the value that is read (or is set internally) after powering up from 0 V. ∗2) "o" indicates write-protected bits. A zero is always read from these bits. ∗3) "−" indicates a default value is undefined. • This
ページ14に含まれる内容の要旨
RX - 8581 SA / JE / NB 8.2.6. Clock counter (Reg - 0 ∼ 2) Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ! 0 SEC 40 20 10 8 4 2 1 ! 1 MIN 40 20 10 8 4 2 1 ! ! 2 HOUR 20 10 8 4 2 1 ∗) "o" indicates write-protected bits. A zero is always read from these bits. • The clock counter counts seconds, minutes, and hours. • The data format is BCD format. For example, when the "seconds" register value is "0101 1001" it indicates 59 seconds.
ページ15に含まれる内容の要旨
RX - 8581 SA / JE / NB 8.2.8. Calendar counter (Reg 4 to 6) Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ! ! 4 DAY 20 10 8 4 2 1 ! ! ! 5 MONTH 10 8 4 2 1 6 YEAR 80 40 20 10 8 4 2 1 ∗) "o" indicates write-protected bits. A zero is always read from these bits. • The auto calendar function updates all dates, months, and years from January 1, 2001 to December 31, 2099. • The data format is BCD format. For example, a date register valu
ページ16に含まれる内容の要旨
RX - 8581 SA / JE / NB 8.3. Fixed-cycle Timer Interrupt Function The fixed-cycle timer interrupt generation function generates an interrupt event periodically at any fixed cycle set between 244.14 µ s and 4095 minutes. When an interrupt event is generated, the /INT pin goes to low level and "1" is set to the TF bit to report that an event has occurred. (However, when a fixed-cycle timer interrupt event has been generated low-level output from the /INT pin o
ページ17に含まれる内容の要旨
RX - 8581 SA / JE / NB 8.3.2. Related registers for function of time update interrupts. Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 B Timer Counter 0 128 64 32 16 8 4 2 1 C Timer Counter 1 • • • • 2048 1024 512 256 USEL ! ! D Extension Register TEST WADA TE TSEL1 TSEL0 ! ! ! ! UF AF VLF E Flag Register TF ! ! UIE ! F Control Register TIE AIE STOP RESET ∗1) "o" indicates write-protected bits. A zero is always read from these bits. ∗2
ページ18に含まれる内容の要旨
RX - 8581 SA / JE / NB 5) TIE (Timer Interrupt Enable) bit When a fixed-cycle timer interrupt event occurs (when the TF bit value changes from "0" to "1"), this bit's value specifies whether an interrupt signal is generated (/INT status changes from Hi-Z to low) or is not generated (/INT status remains Hi-Z). TIE Data Description 1) When a fixed-cycle timer interrupt event occurs, an interrupt signal is not generated or is canceled (/INT status remains Hi-Z)
ページ19に含まれる内容の要旨
RX - 8581 SA / JE / NB 8.4. Time Update Interrupt Function The time update interrupt function generates interrupt events at one-second or one-minute intervals, according to the timing of the internal clock. When an interrupt event occurs, the UF bit value becomes "1" and the /INT pin goes to low level to indicate that an event has occurred. (However, when a fixed-cycle timer interrupt event has been generated, low-level output from the /INT pin occurs only
ページ20に含まれる内容の要旨
RX - 8581 SA / JE / NB 8.4.2. Related registers for time update interrupt functions. Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ! ! TEST WADA TE TSEL1 TSEL0 D Extension Register USEL ! ! ! ! TF AF VLF E Flag Register UF ! ! ! TIE AIE STOP RESET F Control Register UIE ∗) "o" indicates write-protected bits. A zero is always read from these bits. ∗ Before entering settings for operations, we recommend writing a "0" to the UIE bit
