ページ1に含まれる内容の要旨
M61323SP/FP
Wide Frequency Band Analog Switch
REJ03F0201-0201
Rev.2.01
Mar 31, 2008
Description
The M61323SP/FP is a semiconductor integrated circuit for the RGBHV interface. The device features switching
signals input from two types of image sources and outputting the signals to the CRT display, etc. Synchronous signals,
meeting a frequency band of 10 kHz to 200 kHz, are output at TTL. The frequency band of video signals is 250 MHz,
acquiring high-resolution images, and are optimu
ページ2に含まれる内容の要旨
M61323SP/FP Block Diagram M61323SP Output Sync-Sep. OUT Output (V) Output (R) Output (G) Output (B) (G-Buffer) Output (H) GND GND GND GND V (R) V (G) V (B) Sync-Sep. INPUT V CC CC CC CC 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 V (R) V (G) V (B) V CC CC CC CC Sync-Sep. RB G G H V POWER V (R) V (G) V (B) CC CC CC GND SAVE SW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Input1 (R) Input1 (G) Input1 (B) Input1 (V) Input2 (R) Input2 (G) Input2 (B) Input2 (V) V (R) V (G) V (B) CC CC CC Input1 (H)
ページ3に含まれる内容の要旨
M61323SP/FP Pin Arrangement M61323SP M61323FP V 1 (R) V 1 (R) 1 32 V 2 (R) 1 36 NC CC CC CC 35 Input1 (R) 2 31 Output (R) Input1 (R) 2 V 2 (R) CC 30 V 1 (G) 3 V 1 (G) 3 34 GND2 (R) Output (R) CC CC V 2 (G) 33 Input1 (G) Input1 (G) 4 29 CC 4 GND2 (R) V 1 (B) 28 Output (G) V 1 (B) V 2 (G) 5 5 32 CC CC CC Input1 (B) GND2 (G) Input1 (B) 6 27 6 31 Output (G) 26 Input1 (H) V 2 (B) Input1 (H) 30 GND2 (G) 7 7 CC Input1 (V) Output (B) Input1 (V) 8 25 8 29 V 2 (B) CC GND1 GND2 (B) GND1 24 28 Output (B)
ページ4に含まれる内容の要旨
M61323SP/FP Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Supply voltage V 7.0 V CC Power dissipation Pd 1603 (SP), 1068 (FP) mW Operating temperature Topr −20 to +85 (SP), −20 to +75 (FP) °C Storage temperature Tstg −40 to +150 °C Electrostatic discharge Surge ±200 V Recommended supply voltage Vopr 5.0 V Recommended supply voltage range Vopr' 4.75 to 5.25 V Electrical Characteristics (M61323SP V = 5.0 V, Ta = 25°C) CC Test Limits Input SW Point SW2 SW4 SW6 SW7 S
ページ5に含まれる内容の要旨
M61323SP/FP Electrical Characteristics (cont.) Limits Test Input SW Point SW2 SW4 SW6 SW7 SW8 SW10 SW12 SW14 SW15 SW16 SW22 SW11 SW13 Item Symbol Min. Typ. Max. Unit (s) Rin1 Gin1 Bin1 Hin1 Vin1 Rin2 Gin2 Bin2 Hin2 Vin2 Sync P.sav Switch Freq. characteristic1 −10 1 dB 31 abb bab bbabb bb b b b b a b F C1 (100 MHz) 28 SG4 SG4 SG4 3 V 25 Relative −10 1 ∆F dB Relative to measured values above C1 Freq.characteristic1 (100 MHz) Freq.characteristic2 F −11 0 dB31 bb bb b b abb bab bba b b a a C2 (1
ページ6に含まれる内容の要旨
M61323SP/FP Electrical Characteristics (cont.) Test Limits Input SW Point SW2 SW4 SW6 SW7 SW8 SW10 SW12 SW14 SW15 SW16 SW22 SW11 SW13 Item Symbol Min. Typ. Max. Unit (s) Rin1 Gin1 Bin1 Hin1 Vin1 Rin2 Gin2 Bin2 Hin2 Vin2 Sync P.sav Switch HV SW High level 3.8 4.2 V 18 bb b a a b b b b b b a b Vdch1 output voltage1 19 SG8 SG8 3 V High level 3.8 4.2 V 18 bb b bb b b b a a b a a Vdch2 output voltage2 19 SG8 SG8 3 V 3 V Low level 0.2 0.5 V 18 bb b a a bb b bb b a b Vdcl1 output voltage1 19 S
ページ7に含まれる内容の要旨
M61323SP/FP Electrical Characteristics Test Method (M61323SP) Circuit Current 1 No signal. Measure the total circuit current as I when supplying 3 VDC to pin 11. CC Circuit Current 2 No signal. Measure the total circuit current as I STBY when pin 11 connected to GND. CC Output DC Voltage 1, 2 Set SW13 to GND (or OPEN), measure the DC voltage of TP31 (TP28, TP25) when there is no signal input. The DC voltage is as vdc1 (vdc2). Output DC Voltage 3, 4 Measure the DC voltage TP23 same as
ページ8に含まれる内容の要旨
M61323SP/FP Freq. Characteristic 3, 4 Measure the F , F when SG5 of input signal. (For reference) C3 C4 Crosstalk between Two Inputs 1, 2 1. The conditions is as table. This measurement shall use active probe. 2. Set SW13 to GND, input SG3 to pin 2 only. Read the output amplitude of TP31. The value is as V 3. OR 3. Then set SW13 to OPEN, read the output amplitude of TP31. The value is as V 3'. OR 4. Crosstalk between two inputs 1 C.T.I.1 is V 3' [V ] OR P-P C.T.I.1 = 20log
ページ9に含まれる内容の要旨
M61323SP/FP Pulse Characteristic 1, 2 1. The conditions is as table (SG5 amplitude 0.7 V ). Set SW13 to GND (or OPEN). P-P 2. Measure rising Tri and falling Tfi for 10% to 90% of the input pulse with active probe. 3. Next, measure rising Tro and falling Tfo for 10% to 90% of the output pulse with active probe. 4. Pulse characteristic Tr1, Tf1 (Tr2, Tf2) is 100% 90% 2 2 Tr1 (Tr2) = (Tro) − (Tri) (ns) √ 10% 0% 2 2 Tf1 (Tf2) = (Tfo) − (Tfi) (ns) √ Tr Tf High Level Outp
ページ10に含まれる内容の要旨
M61323SP/FP Sync Input Minimum Voltage Gradually decreasing the amplitude of SG7 in pin 22, measure the amplitude of SG7 when the Sync-Sep output signal turn off. The value is as SYrv. Sync Output High Level Voltage/Sync Output Low Level Voltage Input SG7 to pin 22, read the output high level and low voltage of TP21. The value is as SYVH, SYVL. Sync Output Rising Time/Sync Output Falling Time 1. The conditions is as table. (SG7 amplitude 0.3 V ) P-P This measurement
ページ11に含まれる内容の要旨
M61323SP/FP Input Signal SG No. Signals SG1 Sine wave (f = 60 kHz, 0.7 V (Amplitude variable) ) P-P 0.7 V P-P (variable) SG2 Sine wave (f = 1 MHz, 0.7 V (Amplitude variable) ) P-P SG3 Sine wave (f = 10 MHz, 0.7 V (Amplitude variable) ) P-P SG4 Sine wave (f = 100 MHz, 0.7 V (Amplitude variable) ) P-P SG5 Sine wave (f = 250 MHz, 0.7 V (Amplitude variable) ) P-P SG6 DUTY 80% fH = 60 kHz 0.7 V P-P 0.7 V P-P SG7 Sync (fH = 60 kHz) Amplitude variable (Typ. = 0.3 V ) P-P 4.5 µs SG8 TTL
ページ12に含まれる内容の要旨
+ A M61323SP/FP Test Circuit (M61323SP) TP23 SG SS b a 0.01 µ V C 5 V CC SW22 SW C b a b a b a SW32 SW29 SW26 47 µ b a A TP31 TP28 TP25 TP21 a 0.01 µ 47 µ V B CC 1 µ 5 V TP19 TP18 b SW B 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 R-OUT G-OUT B-OUT V CC V V V CC CC CC R-SW G-SW B-SW V V V CC CC CC ECO-SW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 TP11 TP13 0.01 µ 0.01 µ 0.01 µ SW11 SW13 + A b c b c a a a b open open + + + SW A + + + 75 75 75 V A 5 V CC SW7 SW8 SW15 SW16 75 75 75 a b a b ab ab
ページ13に含まれる内容の要旨
+ M61323SP/FP Application Example (M61323SP) OUTPUT V CC R + 5 V OUT G OUT 0.01 µ 47 µ B OUT G Buffer OUT Sync SEP OUT Hout Vout + + + 1 µ V CC + 5 V V CC 47 µ 0.01 µ 5 V + POWER SAVE VCC 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 (H-SW, V-SW, 0.01 µ 47 µ G-Buffer, Sync-SEP) V V V V CC CC CC CC Sync RBGV G H Sepa V V V Power save CC CC CC (5 V) (5 V) (5 V) SW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 0.01 µ 0.01 µ 0.01 µ 0 to 0.8 V : INPUT1 2.0 to 5.0 V: INPUT2 + + + + + + PowerSave V CC 7
ページ14に含まれる内容の要旨
M61323SP/FP Pin Description (M61323SP) pin No. Name DC Voltage (V) Peripheral Circuit Function 1 V (R) 5.0 CC 3 V (G) CC 5 V (B) CC 20 V (H, V, CC Sync-Sep.) 26 V (ROUT) 5.0 CC 29 V (GOUT) CC 32 V (BOUT) CC 2 Input1 (R) 2.3 Input signal with low impedance 4 Input1 (G) 750 6 Input1 (B) 3 V 10 Input2 (R) 12 Input2 (G) 643 14 Input2 (B) 2.48 V 2.2 mA 7 Input1 (H) Input pulse between 3 V and 5 V 8 Input1 (V) 3 to 5 V 15 Input2 (H) 500 16 Input2 (V) 0 to 0.8 V 7 k SW
ページ15に含まれる内容の要旨
M61323SP/FP Pin Description (M61323SP) (cont.) pin No. Name DC Voltage (V) Peripheral Circuit Function 11 PwrSave-SW 2.5 Do not apply more 5 V DC voltage 30 k 15 k 25 k 2.0 V 10 k 25 k 20 k 20 k 20 k 13 CONT-SW 2.4 Do not apply more 5 V DC voltage 26 k 15 k 5 k 2.4 V 24 k 7.3 k 18 Vout 19 Hout 20 k 100 15 k 15 k REJ03F0201-0201 Rev.2.01 Mar 31, 2008 Page 15 of 19
ページ16に含まれる内容の要旨
M61323SP/FP Pin Description (M61323SP) (cont.) pin No. Name DC Voltage (V) Peripheral Circuit Function 21 Sync sep OUT 15 k 100 15 k 15 k 22 Sync sep IN Connect a capacitance between the pin and GND 10 k when not use SYNC-SEP 10 k 2 k CLAMPref Vth 23 G Buffer OUT 5 k 5 k 2 k 25 Video OUT (B) 1.5 32, 29, 26 pin 28 Video OUT (G) 31 Video OUT (R) 50 31, 28, 25 pin 30, 27, 24 pin REJ03F0201-0201 Rev.2.01 Mar 31, 2008 Page 16 of 19
ページ17に含まれる内容の要旨
M61323SP/FP Note How to Use This IC (M61323SP) 1. R, G, B input signal is 0.7 V of standard video signal. P-P 2. H, V input is 5.0 V TTL type. 3. Input signal with sufficient low impedance to input terminal. 4. The terminal of R, G, B output pin are shown as figure 1. When resistance is connected between the pin 31 (28, 25) and GND, I will be increase. CC 5. Switch (pin 13) can be changed by supplying some voltage as figure 2. 0 to 0.5 V: INPUT1 2.5 to 5 V: INPUT2 Do not apply V or mo
ページ18に含まれる内容の要旨
M61323SP/FP Cautions for Manufacturing Boards Built-in wide band preamplifier may cause oscillation due to the wiring shape on the board. Be careful for the following points. • V shall use a stable power supply. CC (Individual V should use an independent power supply.) CC • GND should be as wide as possible. Basically, solid earth should be used. Make the load capacitance of output pins as small as possible. • Also ground the hold capacitance to stable GND, which is as near to the pin a
ページ19に含まれる内容の要旨
M61323SP/FP Package Dimensions JEITA Package Code RENESAS Code Previous Code MASS[Typ.] P-SDIP32-8.9x28-1.78 PRDP0032BA-A 32P4B 2.2g 32 17 NOTE) 1 16 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. *2 2. DIMENSION "*3" DOES NOT D INCLUDE TRIM OFFSET. Dimension in Millimeters Reference Symbol Min Nom Max e 1 9.86 10.16 10.46 D 27.8 28.0 28.2 E 8.75 8.9 9.05 A 5.08 A 1 0.51 *3 *3 b b p b e 3 2 A SEATING PLANE 2 3.8 b p 0.35 0.45 0.55 b2 0.63 0.73 1.03 b3 0.9 1.0 1.3 c 0.22 0.27 0.34 0° 15
ページ20に含まれる内容の要旨
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas
