ページ1に含まれる内容の要旨
HD74LVC1G66
Single Analog Switch
REJ03D0026–0300Z
Rev.3.00
Jul. 01, 2004
Description
The HD74LVC1G66 has an analog switch in a 5-pin package. Switch section has its enable input control (CONT).
High-level voltage applied to CONT turns on the switch section. Applications include signal gating chopping,
modulation or demodulation (modem), and signal multiplexing for analog to digital to analog conversion systems. Low
voltage and high-speed operation is suitable for the battery powered products
ページ2に含まれる内容の要旨
HD74LVC1G66 Pin Arrangement 0.9 mm Height 0.5 mm 0.5 mm pitch GND 34 CONT 0.17 mm 5–Ball (CP) 0.23 mm 5–Ball (CL) OUT/IN 2 Pin#1 INDEX V IN/OUT 15 CC (Bottom view) (Top view) (Top view) Logic Diagram 1 2 2 IN/OUT OUT/IN OUT/IN 4 CONT Absolute Absolute Maximum Maximum Ratings Ratings Item Sy Symbol mbol Ra Ratings tings Unit Test Conditions Supply voltage range V V –0.5 –0.5 to to 6.5 6.5 V CC CC *1 Input voltage range V V –0.5 –0.5 to to 6.5 6.5 V II *1, 2 Output voltage range V V –0.5 –0.5
ページ3に含まれる内容の要旨
HD74LVC1G66 Recommended Operating Conditions Item Symbol Min Max Unit Conditions Supply voltage range V 1.65 5.5 V CC Control Input voltage range V 05.5V I Input/Output voltage range V 0V V I/O CC Input transition rise or fall rate ∆t / ∆v020 ns / V V = 1.65 to 1.95 V, CC 2.3 to 2.7 V 010 V = 3.0 to 3.6 V CC 010 V = 4.5 to 5.5 V CC Operating free-air temperature T –40 85 °C a Note: Unused or floating inputs must be held high or low. Electrical Characteristics Ta = –40 to 85°C Item Symb
ページ4に含まれる内容の要旨
HD74LVC1G66 Switching Characteristics V = 1.8 ± 0.15 V CC Ta = –40 to 85°C FROM TO Item Symbol Min Max Unit Test Conditions (Input) (Output) 1 Propagation delay time* t 2.0 ns C = 30 pF, R = 1.0 kΩ INOUT or OUTIN or PLH L L t OUTIN INOUT PHL Enable time t 2.5 12.0 C = 30 pF, R = 1.0 kΩ CONT INOUT or ZH L L t OUTIN ZL Disable time t 2.2 10.0 C = 30 pF, R = 1.0 kΩ CONT INOUT or HZ L L t OUTIN LZ V = 2.5 ± 0.2 V CC Ta = –40 to 85°C FROM TO Item Symbol Min Max Unit Test Conditions (Input) (Output)
ページ5に含まれる内容の要旨
HD74LVC1G66 Analog Switch Characteristics Ta = 25°C FROM TO Item V (V) Unit Test conditions (Input) (Output) CC Min Typ Max 1.65 — 35 — Frequency response MHz C = 50 pF, Adjust fin voltage to obtain INOUT or OUTIN or L 2.3 — 120 — (Switch ON) R = 600 Ω 0dBm at output when fin is OUTIN INOUT L 3.0 — 175 — 1MHz (sine wave). 4.5 — 195 — Increase fin frequency until 1.65 — >300 — C = 5 pF, L the dB–meter reads –3 dBm. 2.3 — >300 — R = 50 Ω L 20 log(V /V ) = –3 dBm O I 3.0 — >300 — 4.5 — >300 — 1.65
ページ6に含まれる内容の要旨
HD74LVC1G66 Test Circuit • R ON V CC V =V C IH V CC V IN–OUT V =V (ON) IN CC V R = (Ω) OUT ON I S GND I S + – V V IN–OUT • I (off), I (on) SS V V CC CC V =V V =V V =V V =V V =V C IL C C C IH IH IH V V CC CC A (OFF) A (ON) V =V V =GND V =GND V =GND V =GND V =V V =V V =V V =V V =V V =V V IN CC OUT OUT OUT IN IN IN CC CC CC OUT GND GND or GND or V or V or V or V or GND or GND OPEN CC CC CC Rev.3.00 Jul. 01, 2004 page 6 of 10
ページ7に含まれる内容の要旨
HD74LVC1G66 Test Circuit (cont.) VTT TEST S1 R S1 L OPEN From Output t / t OPEN PLH PHL GND t / t GND ZH HZ C R L L t / t VTT ZL LZ Load circuit INPUTS V C R V (V) VTT ∆V ref L L CC t / t V r f I V V / 2 2 × V 1.8±0.15 ≤ 2 ns 30 pF 1.0 kΩ 0.15 V CC CC CC V V / 2 2 × V 2.5±0.2 ≤ 2 ns 30 pF 500 Ω 0.15 V CC CC CC V V / 2 2 × V 3.3±0.3 ≤ 2.5 ns 50 pF 500 Ω 0.3 V CC CC CC V V / 2 2 × V 5.0±0.5 ≤ 2.5 ns 50 pF 500 Ω 0.3 V CC CC CC V I Input V V ref ref 0 V t tt PLH PHL PHL V OH Output V V
ページ8に含まれる内容の要旨
HD74LVC1G66 Frequency response (Switch ON) V CC V = V C IH f = sine wave in V CC 0.1 µF V IN f V in (ON) OUT R = 600 Ω Ω R = 50 L GND L C = 50 pF L or 50 Ω or 5 pF V /2 CC Crosstalk (Control input to signal output) V CC R = L 50 Ω V C V CC V V OUT R = R = R = R = R = GND GND L L L L C = 50 pF C = 50 pF C = 50 pF C = 50 pF L L L Ω Ω 600 Ω 600 600 V /2 V /2 V /2 V /2 V /2 CC CC CC CC Feedthrough attenuation (Switch OFF) Feedthrough attenuation (Switch OFF) V V V
ページ9に含まれる内容の要旨
b D E e x y y 1 ZD ZE HD74LVC1G66 Package Dimensions TBS-5V (g) EIAJ Package Code JEDEC Code Mass Lead Material 0.001 D e ZD C B B A 12 Pin #1 index area A 5 5 × × φ φ b b y / 1 φ φ x x M M C C A A B φ φ x x M M C C C Seating plane Dimension in Millimeters Symbol Symbol Min Typ Max y C A 0.50 A1 0.10 0.15 0.35 A2 0.19 0.15 0.17 0.90 1.40 0.50 0.05 0.05 0.20 0.20 0.20 Rev.3.00 Jul. 01, 2004 page 9 of 10 E A1 A2 A ZE e C/
ページ10に含まれる内容の要旨
b D D E e x y y 1 ZD ZE HD74LVC1G66 TBS-5AV (g) EIAJ Package Code JEDEC Code Mass Lead Material 0.001 D e ZD C B B A 12 Pin #1 index area A 5 × φ b y / 1 φ x M C A B M φ x C C Seating plane Dimension in Millimeters Symbol Min Nom Max y C A 0.50 0.155 0.185 A1 (0.315)* A2 *Reference value. 0.20 0.25 0.90 1.40 0.50 0.05 0.05 0.20 0.20 0.20 Rev.3.00 Jul. 01, 2004 page 10 of 10 E A1 A2 A ZE e C/
ページ11に含まれる内容の要旨
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appr
