ページ1に含まれる内容の要旨
FILE NO. 336-9707
TECHNICAL TRAINING MANUAL
3 LCD DATA PROJECTOR
TLP511U
TLP510U
TLP511E
TLP510E
PRINTED IN JAPAN, Nov., 1997 S
ページ2に含まれる内容の要旨
CONTENTS 1. MAIN POWER SUPPLY 6. DIGITAL CIRCUIT ...................6-1 6-1. Outline ........................................................ 6-1 CIRCUIT .....................................1-1 6-2. Each IC Description .................................. 6-3 1-1. Description ................................................. 1-1 1-2. Output Control .......................................... 1-1 1-3. Voltage Switching ...................................... 1-1 7. VIDEO SIGNAL PROCESS 1-4. Over-vol
ページ3に含まれる内容の要旨
1-3. Voltage Switching 1. MAIN POWER SUPPLY CIRCUIT When the voltage switching terminal of connector C 1-1. Description opens, pin 1 develops low, since the pin 2 of IC401 is 6V, This power supply boosts up at boost-up-converter just higher than pin 2 (3V), the voltage adjusted to 16.3V is after bridge-rectifying AC input voltage, supplies the directly developed from IC201, since the status of Q205 voltage smoothed to DC 350V to the lamp output. Then turns off. When the voltage switching termina
ページ4に含まれる内容の要旨
1-5. Over-current Protection The over-current protection for lamp output detects the In S6V and +6V lines, the voltage drop owing to the voltage drop of the current detection resistor R113 at current flowing in L203 is detected by pins 5 and 6 of between pins 9 and 10 of IC302. When voltage switching IC401, when the total current amount exceeds 8A, pin 7 terminal of connector C opens (at 16.3V), the photo develops high and the voltage biasses the base voltage of coupler PH303 turns
ページ5に含まれる内容の要旨
2. LAMP POWER SUPPLY CIRCUIT (LAMP DRIVER) 2-1. Configuration The lamp power supply cicrcuit receives a DC220 to 390V (primary side) from the system power supply and provides a AC voltage (70 to 100V at ever turning on AC the lamp) to turn on the lamp. Fig. 2-1-1 shows the block diagram. Lamp Driver L1 L1 Commu- Stabilizer Igniter tator L2 R1 C1 Lamp C2 Control Mains I122 isolated I121 Rs Cs 100nF 1K CB3 CB2-1 CB2-2 EMC GND SCI (optional) Common Flag Fig. 2-1-1 The DC voltage is supplied to CB1
ページ6に含まれる内容の要旨
3. OPTICAL SYSTEM 3-1. Configuration No. Name Description Light source of the optical system. AC lighting system 120W, arc length 1.3 mm. As the arc length is shorter than the conventional metal halide lamp, the light source 1 UHP lamp operates as an ideal light point source and this improves the light convergence factor. Lamp Also, the color temperature gets higher and this allows to reproduce more natural unit white color. Parabolic Parabolic reflector converges light emitted from the UHP lamp
ページ7に含まれる内容の要旨
15 XGA 1.3 inch 3 plates system 14 10 1 9 -3 UHP (120W) 9 12 13 -1 2 10 3 13 12 4 13 A 10 5 9 -2 6 8 4 -2 11 7 B 8 -1 Fig. 3-1-1 Optical configuration diagram 3-2
ページ8に含まれる内容の要旨
4. R.G.B. DRIVE CIRCUIT 4-1. Outline The outline of RGB drive circuit is described below using the G process of the RGB drive circuit as an example. Exclusive for odd number pixel Q516 Panel Q505,Q506,Q507 VIDEO 1 Normal Q502 SW1 input Q514 Q515 amp.1 Odd number 1 1 2 SW3 SW5 1 pixel memory DAC1 Amp. 3 Q508,Q509,Q510 2 2 2 Inverted 4 amp.1 5 Q511,Q512,Q513 1 6 Normal Q504 7 1 amp.2 Even number 1 8 Q514 1 DAC2 pixel memory Amp. Q515 Q523,Q524,Q510 9 2 SW4 2 SW6 SW2 2 Inverted 10 amp.2 11 12 2 Li
ページ9に含まれる内容の要旨
The signal as shown in Fig. 4-1-1 is separated into the 3) the signal passing through DAC2 ® Q504 ® Normal odd and even pixels at the digital PC board. After the amp. 1 ® SW41 ® SW6 ® Q517 to the positive signal process is carried out in the drive PC board, the phase 2 and odd and even pixel signals are synthesized to 4) the signal passing through DAC2 ® Q504 ® inverted decomposite the signal on the panel. amp. 2 ® SW42 ® SW6 ® Q517 to inverted phase Referring to Fig. 4-1-1, the operation princi
ページ10に含まれる内容の要旨
4-2. Operation Description 4-2-1. Outline of Liquid Crystal Panel The liquid crystal panel module is an active matrix panel The video signal of the odd number pixel (even number with a built-in driver of multi-crystal silicon. The liquid pixel) is sent to Q501 (Q503) base and supplied to pin 16 crystal panel module is designed for use of color projec- of Q502 (Q504), LM1201M. The signal is clamped at tors in combination with an enlargement projection pin 16 and the pedestal voltage is adjusted a
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Table 4-2-2 Input terminal function description Name Function DX Start pulse input terminal of X shift register composing X driver. CLX, CLX Transfer clock input terminal X shift register composing X driver DIRX, DIRX X driver driving direction switch input terminal (DIRX = H R shift, DIRX = L L shift) ENB1 – ENB2 X driver enable pulse input terminal VID1 – VID12 X driver video signal input terminal DY Start pulse input terminal of Y shift register composing Y driver. CLY, CLY Transfer clock in
ページ12に含まれる内容の要旨
5-1-3. Adjustment Control 5. MICROPROCESSOR • Video controls (high & low brightness ratio, 5-1. System Outline brightness, color density, tint, sharpness) The system microprocessor has features as shown below. • Panel adjustments (V position, H position, In considering easy maintenance for specification phase, clock, user registration, user read-out) modification, etc., the program content is written in the • Mode adjustments (Wide, MIC, OSD mute, built-in non-volatile memory. projection) The p
ページ13に含まれる内容の要旨
/ / / / / / / / / / / 5-2 PL010 PL004 PL001 2 HC125 PL001 / 2 / 2 / QL012 HC125 3 DRIVE 2 2 12 4 3 2 / 2 7 5 4 78 79 11 10 77 76 75 74 72 71 70 69 68 67 66 65 64 63 62 61 60 59 49 55 54 QL010 PL003 QL005 58 HC165 57 HC14 3 5 53 / / SENSOR QL002 19 HD64F3337YF16 52 51 1 48 16 17 21 22 23 24 25 26 27 28 39 40 41 42 43 44 PL009 PL006 QL003 QL004 PQ20VZ1U RN5VD27A 6 2 8 HC541 QL007 PL002 6 CAT24C16J SW LED QL006 Fig. 5-1-1 System block diagram
ページ14に含まれる内容の要旨
5-2. System Microprocessor Using an exclusive data-writer allows easy maintenance of the system microprocessor when specification modifi- The system microprocessor QL002 employs an 8 bit cation, bug correction, etc. will occur. micro-controller (HD64F3337YF16). Table 5-2-1 shows the terminal functions of the system In this system microprocessor, a program area is pro- microprocessor. vided inside the non-volatile memory. Table 5-2-1 Terminal functions of the system microprocessor Pin No. Name F
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5-3. Power Supply Reset Process 5-5. Remote Control Reception Process In the power supply reset process, power supply reset IC In the remote control reception process, a remote control (RN5VD27A), QL004 is employed. unit (CT-9925) connected to the remote control terminal emits a remote control signal and a remote control signal The reset IC,QL004, develops the reset signal when the receive section on the front panel, the rear panel or the power supply voltage for the microprocessor varies and ca
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5-8. Status Display Process 5-9. On-screen Display Process In the status display process, two-color lighting LEDs of In the on-screen display process, control signals are DL037, DL038 and DL039 turn ON for each kind of supplied to the OSD display IC QX003 (CD0016AM), status shown in the table below by using LED0 to LED5 and the OSD display IC generates character display terminal output of the microprocessor. signals at the timing determined by VD, HD and clock supplied to the IC separately. Tabl
ページ17に含まれる内容の要旨
5-10. Video System Control Process 5-11. Panel System Control Process In the video system control process, control signals are The panel system control process supplies various supplied to various video system process ICs shown in control signals to the panel system control ICs shown in 2 the table below. Table 5-10-1 shows the I C control for the table below. each kind of video system. Table 5-11-1 shows the IC control for each kind of panel system. 2 Table 5-10-1 I C control for each kind of
ページ18に含まれる内容の要旨
5-12. Drive System Control Process Table 5-12-1 shows each kind of the drive system IC control. In the drive system control process, the control signal is supplied to each kind of drive system process ICs shown in the the table below. Table 5-12-1 Each kind of the drive system IC control Part No. Type name Process M62399FP Q701 Process relative to R drive (Custom: $90) M62399FP Q702 Process relative to G drive (Custom: $92) M62399FP Q703 Process relative to B drive (Custom: $94) M62399FP Q704 P
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5-14. Applicable Signal In other mode, the signal line number is detected to allow the separate adjustment in the VGA system (basically Various kinds of signals are used as the applicable effective for line number of 480 lines), SVGA system signals in the preset mode (standard value) as shown in (basically effective for line number of 600 lines) and Table 5-14-1. For the signals not fit to the preset modes, XGA system (basically effective for line number of 768 a user mode is provided. lines). I
ページ20に含まれる内容の要旨
5-15. RS-232C Control Method Table 5-15-1 RS-232C connection signals Signals are connected to the RS-232C connector in a Pin No. Signal name Signal content I/O 2 RXD Receive data I straight format as shown in Table 5-15-1 RS-232C connection signals. This is because a crossing connec- 3 TXD Transmit data O tion is provided inside the unit. Communication condi- 4 DTR Data terminal ready O tions are set to meet the conditions given in Table 5-15-2. 5 S. G Signal ground I 6 DSR Data set ready I Ta
