ページ1に含まれる内容の要旨
Multipoint-Low Voltage
Differential Signaling
(M-LVDS) Evaluation Module
User’s Guide
High Performance Analog
April 2004
SLLU039B
ページ2に含まれる内容の要旨
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the t
ページ3に含まれる内容の要旨
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found in the end product
ページ4に含まれる内容の要旨
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the supply voltage range of 3 V to 3.6 V. Exceeding the specified supply range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the supply range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM. Please consult
ページ5に含まれる内容の要旨
Preface How to Use This Manual This document contains the following chapters: Chapter 1—The M-LVDS Evaluation Module Chapter 2—Test Setup Chapter 3—Bill of Materials, Board Layout, and PCB Construction Appendix A—Schematic Related Documentation From Texas Instruments and Others Introduction to M-LVDS (SLLA108) LVDS Designer’s Notes (SLLA014A). Reducing EMI With Low Voltage Differential Signaling (SLLA030B). Interface Circuits for TIA/EIA−644 (LVDS) (SLLA038B). Transmission at 2
ページ6に含まれる内容の要旨
vi
ページ7に含まれる内容の要旨
Running Title—Attribute Reference Contents 1 The M-LVDS Evaluation Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 M-LVDS Standard TIA/EIA−899 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1.3 M-LVDS EVM Kit Contents . . . . . . . . .
ページ8に含まれる内容の要旨
Running Title—Attribute Reference Figures 1−1. M-LVDS Unit Interval Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1−2. Expanded Graph of Receiver Differential Input Voltage Showing Transition Region . . . . 1-4 1−3 Point-to-Point Simplex Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 1−4 Parallel Termination Simplex Circuit . . . . . . . . . . . . . . . . . . . . .
ページ9に含まれる内容の要旨
Chapter 1 The M-LVDS Evaluation Module This document describes the multipoint low-voltage differential-signaling (M-LVDS) evaluation module (EVM) used to aid designers in development and analysis of this new signaling technology. The Texas Instruments SN65MLVD200A, SN65MLVD201, SN65MLVD202A, SN65MLVD203, SN65MLVD204A, SN65MLVD205A, SN65MLVD206, SN65MLVD207 series are low-voltage differential line drivers and receivers complying with the M-LVDS standard (TIA/EIA−899). The EVM kit contains the a
ページ10に含まれる内容の要旨
Overview 1.1 Overview The EVM comes with all the production devices in Table 1−1. The SN65MLVD201 and SN65MLVD207 are installed on the circuit board, and can easily be replaced with the other devices supplied. The M-LVDS devices evaluated with this EVM are in the SN75ALS180 and SN75176 footprint. Use of these industry standard footprints allows the designer to easily configure the parts into a simplex or half-duplex data bus. These are all TIA/EIA−899 M-LVDS standard compliant devices. While ini
ページ11に含まれる内容の要旨
M-LVDS Standard TIA/EIA−899 The EVM has been designed with the individual driver and receiver section (SN75ALS180 footprint, U1) on one half of the board and the transceiver section (SN75176 footprint, U2) on the other half (see Figure 3−1). The EVM as delivered incorporates two 100-Ω termination resistors at each driver output, receiver input, and transceiver I/O. These allow the user to evaluate a single driver, receiver, or transceiver, while not having to deal with a transmission line or add
ページ12に含まれる内容の要旨
M-LVDS EVM Kit Contents Table 1−2. Receiver Input Voltage Threshold Requirements Receiver Type Low High Type-1 −2.4 V ≤ V ≤ −0.05 V 0.05 V ≤ V ≤ 2.4 V ID ID Type-2 −2.4 V ≤ V ≤ 0.05 V 0.15 V ≤ V ≤ 2.4 V ID ID Figure 1−2. Expanded Graph of Receiver Differential Input Voltage Showing Transition Region Type−1 and Type−2 Receiver Differential Input Thresholds Type 1 Type 2 2.4 High 0.15 High 0.1 0.05
ページ13に含まれる内容の要旨
Configurations 1.4 Configurations The M-LVDS EVM board allows the user to construct various bus configurations. The two devices on the EVM allow for point-to-point simplex, parallel-terminated point-to-point simplex, and two-node multipoint operation. All of these modes of operation can be configured through onboard jumpers, external cabling, and different resistor combinations. The devices which are delivered with the EVM change output operation but, configuration of jumpers to setup the transm
ページ14に含まれる内容の要旨
Configurations 1.4.2 Multidrop A multidrop configuration (see Figure 1−5) with two receiver nodes can be simulated with the EVM. To get additional receiver nodes on the same bus requires additional EVMs. M-LVDS controlled driver transition times and higher signal levels help to accommodate the multiple stubs and additional loads on the bus. This does not exempt good design practices, which would keep stubs short to help prevent excessive signal reflections. A bus line termination could be placed
ページ15に含まれる内容の要旨
Configurations Figure 1−7. Two-Node Multipoint Circuit T T U2 U1 1.4.4 EVM Operation With Separate Power Supplies The EVM has been designed with independent power planes for the two devices. The two devices can be powered with independent supplies or with a single supply. Sending and receiving data between backplanes, racks, or cabinets where separate power sources may exist can have offset ground potentials between nodes. Jumpers W7, 8, 9, and 10 tie the two separate power and ground planes tog
ページ16に含まれる内容の要旨
W10 W8 W7 J13 J14 J17 J18 W9 Recommended Equipment Figure 1−8. EVM Configuration for Including a Ground Potential Difference Voltage Between Nodes + PS1 − + PS2 − + PS3 Jumpers removed from − W7, W8, W9, W10 1.5 Recommended Equipment 3.3 Vdc at 0.5-A power supply or multiple power supplies (with both devices powered and enabled the board draws about 35 mA). A 100-Ω transmission medium from the driver to the receiver, (twisted-pair cable recommended, CAT5 cable for example). A function or p
ページ17に含まれる内容の要旨
Chapter 2 Test Setup This chapter describes how to setup and use the M-LVDS EVM. Topic Page 2.1 Typical Cable Test Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 Test Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 Test Setup 2-1
ページ18に含まれる内容の要旨
Typical Cable Test Configurations 2.1 Typical Cable Test Configurations Each of the following test configurations is a transmission line consisting of a twisted-pair cable connected on the 2-pin connectors (P1, P2, or P3). Table 2−1 shows the possible configurations. In addition to the different transmission topologies, the EVM can also be configured to run off two or three separate power supplies, as described in the previous section. This would allow the user to induce a ground shift or offset
ページ19に含まれる内容の要旨
Typical Cable Test Configurations 2.1.2 Point-to-Point Parallel Terminated Simplex Transmission 1) Connect a twisted-pair cable from P1 to P2. 2) Verify resistor R4 and R7 are installed. 3) Remove resistors R5 and R6. This properly terminates the transmission line at both ends. 4) Enable the driver by connecting the jumper on W2 between pin 1 and pin 2, or U1 pin 4 to V . CC 5) Enable the receiver by connecting the jumper on W1 between pin 2 and pin 3, or U1 pin 3 to GND. Figure 2−2. Point-to-Po
ページ20に含まれる内容の要旨
Typical Cable Test Configurations Figure 2−3. Two-Node Multipoint Transmission V CC W2 Jumper Input Signal 50-Ω 4 Cable 9 J2 R7 5 R6 P2 U1 Signal Source 100 100 R3 10 with 50-Ω 49.9 Output TP2 Twisted Pair Cable 50-Ω R2 Cable 50-Ω cable or J1 12 453 2 R4 R5 Active Voltage U1 P1 100 100 Probe into one 3 11 TP1 V Channel of Scope CC Terminated in V CC High Impedance W1 W4 Output Signal Jumper Jumper Active Voltage Probe Input Signal 3 U2 6 J8 4 P3 R16 R15 100 100 7 R14 49.9 TP4 50-Ω R13 Cable J7 5
