Intel 8 LANの取扱説明書

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内容要旨
ページ1に含まれる内容の要旨

Intel® I/O Controller Hub 8 LAN
NVM Map and Information Guide
January 2008
316234-006
Revision 2.8

ページ2に含まれる内容の要旨

Legal Lines and Disclaimers INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS

ページ3に含まれる内容の要旨

NVM Information Guide—ICH8 Contents 1.0 Non-Volatile Memory (NVM) ......................................................................................5 1.1 Introduction .......................................................................................................5 1.2 NVM Programming Procedure Overview..................................................................5 1.3 EEUPDATE Utility.................................................................................................7

ページ4に含まれる内容の要旨

ICH8—NVM Information Guide 14 Extended Configuration Word 3 (Word 16h) ................................................................14 15 LED 1 Configuration and Power Management (Word 17h)...............................................15 16 LED Modes ..............................................................................................................16 17 LED 0 and 2 Configuration Defaults (Word 18h)............................................................16 18 Boot Agent Main Se

ページ5に含まれる内容の要旨

ICH8—NVM Information Guide 1.0 Non-Volatile Memory (NVM) 1.1 Introduction The document is intended for designs using the 10/100/1000 Mb/s LAN controller that ® I/O Control Hub 8 (ICH8) device. is integrated into the Intel The NVM space is used for hardware and software configuration. It is also read by software to determine and configure specific design features. Unless otherwise specified, all numbers in this document use the following numbering convention: • Numbers that do not have a suff

ページ6に含まれる内容の要旨

NVM Information Guide—ICH8 BIOS Region 1 ME Region 2 GbE Region 3 Flash Descriptor Region 0 Figure 1. LAN NVM Regions To access the NVM, it is essential to correctly setup the following: 1. A valid Flash Descriptor Region must be present. Details for the Flash Descriptor Region are contained in the ICH8 EDS. The FTOOL.exe utility provides the easiest method of configuring this descriptor region. This process is described in detail in ® the Intel Active Management Technology OEM Brin

ページ7に含まれる内容の要旨

ICH8—NVM Information Guide 6. The sector size of the NVM must equal 256 bytes, 4 KB, or 64 KB. When a Flash device that uses a 64 KB sector erase is used, the GbE region size must equal 128 KB. If the Flash part uses a 4 KB or 256-byte sector erase, then the GbE region size must be set to 8 KB. The NVM image contains both static and dynamic data. The static data is the basic platform configuration, and includes OEM specific configuration bits as well as the unique Printed Circuit Board Asse

ページ8に含まれる内容の要旨

NVM Information Guide—ICH8 1.4 LAN NVM Format and Contents Table 1 lists the NVM maps for the LAN region. Each word listed is described in detail in the following sections. Table 1. LAN NVM Address Map LAN NVM Image Word Byte HIgh Byte (Bits 15:8) Low Byte (Bits 7:0) Used By Value Offset Offset Ethernet Individual Address Ethernet Individual Address HW- 00h 00 IA (2,1) Byte 2 Byte 1 Shared Ethernet Individual Address Ethernet Individual Address HW- 01h 02 IA (4,3) Byte 4 Byte 3 Shared Etherne

ページ9に含まれる内容の要旨

ICH8—NVM Information Guide LAN NVM Image Word Byte HIgh Byte (Bits 15:8) Low Byte (Bits 7:0) Used By Value Offset Offset 1Bh to 32h to Reserved 2Fh 5Eh 30h to 60h to PXE Software Region PXE 3Eh 7Ch 3Fh 7Eh Software Checksum (bytes 00h through 7Dh) SW Notes: 1. SW = Software: This is access from the network configuration tools and drivers. 2. PXE = PXE Boot Agent: This is access from the PXE Option ROM code in BIOS. 3. HW-Shared = Hardware - Shared: This is read on when the Shared Configurati

ページ10に含まれる内容の要旨

NVM Information Guide—ICH8 1.4.3 Reserved (Word 04h) Table 4. Reserved (Word 04h) Bit Name Default Description 15:0 Reserved FFFFh These bits are reserved and should be set to FFFFh. 1.4.4 Image Version Information (Word 05h) Table 5. Image Version Information (Word 05h) Bit Name Default Description 15 Reserved 0b This bit is reserved and should be set to 0b. 14:12 NVM Major Version -- This field represents the LAN NVM major version number. 11:4 NVM Minor Version -- This field represents the LAN

ページ11に含まれる内容の要旨

ICH8—NVM Information Guide 1.4.8 PCI Initialization Control (Word 0Ah) This word contains initialization values that: • Set defaults for some internal registers. • Enable/disable specific features. • Determine which PCI configuration space values are loaded from the NVM. Table 8. PCI Initialization Control Word (Word 0Ah) Bit Name Default Description 15:13 Reserved 000b This field is reserved and should be set to 000b. 12 Reserved 1b This field is reserved and should be set to 1b. 11:8 Reserved

ページ12に含まれる内容の要旨

NVM Information Guide—ICH8 1.4.11 Device ID (Word 0Dh) If the Load Vendor/Device IDs bit in word 0Ah is set to 1b, this word is read to initialize the Device ID of the LAN function. ® Table 9. Device IDs for Intel Platform LAN Connects Device ID Adapter 1049h Intel® 82566MM Gigabit Ethernet Controller 104Ah Intel® 82566DM Gigabit Ethernet Controller 104Dh Intel® 82566MC Gigabit Ethernet Controller 104Ch Intel® 82562V 10/100 Mb/s Platform LAN Connect Device 1.4.12 Vendor ID (Word 0Eh) If the Loa

ページ13に含まれる内容の要旨

ICH8—NVM Information Guide 1.4.15 Shared Initialization Control (Word 13h) This word controls general initialization values. Table 11. Shared Initialization Control (Word 13h) Bit Name Default Description Valid Indication This is a 2-bit field indicating whether a valid NVM is present to the MAC. If this field does not equal 10b, the MAC does not read the NVM data and uses default values for device configuration. 15:14 SIGN 10b 00b = Invalid NVM. 01b = Invalid NVM. 10b = Valid NVM present. 11b

ページ14に含まれる内容の要旨

NVM Information Guide—ICH8 1.4.16 Extended Configuration Word 1 (Word 14h) Table 12. Extended Configuration Word 1 (Word 14h) Bit Name Default Description 15 Reserved 0b Reserved. Must be set to 0b. 1b = ICH8 (B0/B1 stepping). 14 Reserved 1b 0b = ICH8 (A0 stepping). 13 Reserved 1b Set this field to 0b. OEM Write Enable 0b = Disable. 12 OEM Write Enable 1b 1b = Enable. Set this field to 0b. Extended This field defines the base address (in Dwords) of the extended 11:0 Configuration 020h configur

ページ15に含まれる内容の要旨

ICH8—NVM Information Guide 1.4.19 LED 1 Configuration and Power Management (Word 17h) This field specifies the default values for the LEDCTL register fields controlling the LED1 (LINK_1000) output behaviors and the OEM fields defining the PHY power management parameters loaded to the PHY_CTRL register. Table 15. LED 1 Configuration and Power Management (Word 17h) Bit Name Default Description This bit enables Smart Power Down in back-to-back link setup. 15 B2B Enable 1b 0b = B2B disabled. 1b =

ページ16に含まれる内容の要旨

NVM Information Guide—ICH8 Table 16. LED Modes Mode (Bits Selected Mode Source Indication 3:0) Asserted when either 10 Mb/s or 1000 Mb/s link is established 0000b LINK_10/1000 and maintained. Asserted when either 100 Mb/s or 1000 Mb/s link is 0001b LINK_100/1000 established and maintained. 0010b LINK-UP Asserted when any speed link is established and maintained. Asserted when link is established and packets are being 0011b FILTER_ACTIVITY transmitted or received that passed MAC filtering. As

ページ17に含まれる内容の要旨

ICH8—NVM Information Guide Table 17. LED 0 and 2 Configuration Defaults (Word 18h) Bit Name Default Description This bit indicates the initial value of the LED0_BLINK field. 7 LED0 Blink 1b 0b = LED0 is non-blinking (recommended). 1b = LED0 is blinking. This bit indicates the initial value of the LED0_IVRT field. 6 LED0 Invert 0b 0b = LED0 has an active low output. 1b = LED0 has an active high output. This bit define the LED0 blink mode: 0b = Blink at 200 ms on and 200 ms off. 5 LED0 Blink Mode

ページ18に含まれる内容の要旨

NVM Information Guide—ICH8 1.4.23 PXE Words (Words 30h - 3Eh) Words 30h through 3Eh (bytes 60h through 7Dh) have been reserved for configuration and version values to be used by PXE code. 1.4.23.1 Boot Agent Main Setup Options (Word 30h) The boot agent software configuration is controlled by the NVM with the main setup options stored in word 30h. These options are those that can be changed by using the Control-S setup menu or by using the IBA Intel Boot Agent utility. Note that these setting

ページ19に含まれる内容の要旨

ICH8—NVM Information Guide Bit Name Description Prompt Time. These bits control how long the "Press Control-S" setup prompt message appears, if enabled by DIM. 00b = 2 seconds (default) 01b = 3 seconds 7:6 PT 10b = 5 seconds 11b = 0 seconds Note that the Ctrl-S message does not appear if 0 seconds prompt time is selected. 5 Reserved Reserved Default Boot Selection. These bits select which device is the default boot device. These bits are only used if the agent detects that the BIOS does not

ページ20に含まれる内容の要旨

NVM Information Guide—ICH8 Table 19. Boot Agent Configuration Customization Options (Word 31h) Bit Name Description Signature. These bits must be set to 01b to indicate that this word has 15:14 SIG been programmed by the agent or other configuration software. 13:11 Reserved Reserved for future use. All bits must be set to 0b. Selects the agent's boot order setup mode. This field changes the agent's default behavior in order to make it compatible with systems that do not completely support the


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