VXI VT1536Aの取扱説明書

デバイスVXI VT1536Aの取扱説明書

デバイス: VXI VT1536A
カテゴリ: ミュージックミキサー
メーカー: VXI
サイズ: 0.7 MB
追加した日付: 6/27/2013
ページ数: 16
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VXI VT1536A 取扱説明書 - Online PDF
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要旨

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内容要旨
ページ1に含まれる内容の要旨

VT1536A
Isolated Digital Input/Output
Signal Conditioning Plug-on
User’s and SCPI Programming Manual
Where to Find it - Online and Printed Information:
System installation (hardware/software) ............VXIbus Configuration Guide*
HP VIC (VXI installation software)*
Module configuration and wiring.......................This Manual
SCPI programming.............................................This Manual
VXIplug&play programming ............................VXIplug&play Online Help
VXIplug&play

ページ2に含まれる内容の要旨

ページ3に含まれる内容の要旨

VT1536A Isolated Digital Input/Output SCP Introduction The VT1536A is an eight-channel Isolated Digital I/O SCP. Channels are switch configurable as either input or output on a channel-by-channel basis. Input-configured channels provide: • Optically coupled isolation  Individual switch selectable threshold levels of 5, 12, 24 and 48 VDC  Two programmable debounce timers (150 µs to 2.4 s); one for the SCP's lower 4 channels and one for the SCP's higher 4 channels.  Programmable polarity Ou

ページ4に含まれる内容の要旨

Identifying the Plug-on You'll find the VXI Technology part number on the connector side of the SCP. For the VT1536A, the part number is: VT1536A. Setting Configuration Switches Each channel has a four-switch package that configure its input threshold voltage level and I/O direction. Locating switches Figure 1 shows the location of each channel's configuration switch package. Figure 1 Locating and Setting Threshold Switches Important! Make certain that you slide the switch handles completel

ページ5に含まれる内容の要旨

Configuring for Input Refer again to Figure 1 for the four valid input threshold, switch configurations. Table 1 shows the "input zero" and "input one" levels for the nominal threshold settings. Table 1 Input Threshold Voltage Levels Nominal Input One Input Zero Threshold Level VDC Minimum VDC Maximum 5 2.1 1.4 12 7 2 24 13 3 48 25 5 Configuring for Output By turning all four of its threshold-setting switches OFF, a channel is configured as an output channel. Installation After the switche

ページ6に含まれる内容の要旨

Figure 2 VT1415A/19A/22A Terminal Module Connections Recommended Signal Connections Figure 3 shows the recommended method of wiring isolated digital I/O channels, as well as the maximum voltage limitations for the VT1536A. Figure 3 shows the shields connected directly to the VT1415A/19A ground. This is to limit potential noise on the isolated digital wiring from affecting low-level analog channel wiring within the Terminal Module. Note The VT1536A is a true isolated SCP. There is no electric

ページ7に含まれる内容の要旨

Figure 3 Recommended Connections and Voltage Limits Input and Output Characteristics This section describes the electrical characteristics of the SCP's input and output sections, as well as the operation of the input debounce timers. Figure 4 shows a simplified schematic of one VT1536A channel. Input Characteristics The input section drives an opto-isolator through a resistor threshold setting network. Your system must provide at least 1 mA of current to drive the opto-isolator. The thresho

ページ8に含まれる内容の要旨

Figure 4 The VT1536A Input and Output Sections Output Voltage Clamp The output section incorporates a "crowbar" protection type voltage clamping diode. In normal operation with the relay voltage at or below 56 Volts peak, the diode has virtually no effect (other than about 10 nanoamperes of leakage current). At 60 Volts, the diode starts to conduct to limit further voltage excursions. In this region, the diode effectively clamps momentary voltage spikes from inductive loads. If an overvolta

ページ9に含まれる内容の要旨

completely asynchronous with the VT1415A/19A algorithm execution rate as set by the Trigger Timer (TRIG:TIMER command). Long debounce periods combined with fast Trigger Timer settings would have the algorithm executing several times for each input debounce-and-latch period. Conversely, short debounce periods and slow Trigger Timer rates would allow multiple debounce-and-latches per algorithm execution. Debounce Example Figure 5 demonstrates the use of debounce. Here we show a system that us

ページ10に含まれる内容の要旨

Programming With SCPI Commands The SCPI commands shown here query the SCP's identification string, and perform VT1536A channel configuration. The VT1415A/19A doesn't provide SCPI commands to read an input channel or control an output channel. Read and write operations are performed by the VT1415A/19A's Algorithm language. See the following section for a digital input/output example. *RST & Power-up The default configuration of the VT1536A at power-up or after a *RST command is: Conditions

ページ11に含まれる内容の要旨

 INP:THR:LEV? returns a numeric value which is one of 5, 12, 24, 48 or 0 (zero) where zero means that the channel is configured as an output and non-zero values indicate the input threshold in volts. Note If an invalid switch combination is set, INP:THR:LEV? will NOT return a value and will generate the error 3105 "Invalid SCP switch setting". This error will also be generated when *RST is executed. Channels associated with this error will behave as input channels with unknown threshold l

ページ12に含まれる内容の要旨

Choose a value from the “Minimum Period” column in Table 2 that is longer than your input signal’s undesired transition period when you want to exclude these short term input signal transitions. Choose a value from the “Maximum Period” column in Table 2 that is shorter than your input signal’s expected transition period when you want to be certain to include these desired input signal transitions. The values to send to the VT1536A are in the “Nominal” column in Table 2 below. Table 2 Nomin

ページ13に含まれる内容の要旨

Note The INP:DEB:TIME generate the error 3108, "E1536 debounce - each referenced 4 Ch bank must contain at least one input". This error indicates that you tried to set a debounce time for a bank of channels that contains no input configured channel. To set the debounce period to 153.6 ms for the lower 4 channels on an VT1536A in SCP position 0 send: INP:DEB 0.1536,(@100:103) To set the debounce period to 1.229 seconds for the upper 4 channels on an VT1536A in SCP position 3 send: INP:DEB 1

ページ14に含まれる内容の要旨

Programming with the VT1415A/19A Algorithm Language The following example shows the command sequence (platform/language independent) to transfer the digital states from the lower 4 channels (inputs) to the upper 4 channels (outputs). In other words, the state you input to one of the lower 4 channels will drive the corresponding output channel. The example assumes that the SCP is installed in SCP position 0 (covers channels 0 through 7), the first four channels are configured as inputs, and

ページ15に含まれる内容の要旨

Specifications SCP Power Supply Requirements +5 Vmax +24 Vtyp +24 Vmax -24 Vtype -24 Vmax 0.072 not used not used Output Characteristics Characteristic Specification (see also Figure 4) Maximum Continuous 56 VDC (39 V ) RMS Voltage Peak Current Load 200 mA Relay On Resistance 10 Ω Turn On/Off Time 3 ms Clamping Voltage* 60 V * See “Output Voltage Clamp” on page 8. Input Characteristics Characteristic Specification (see also Figure 4) Maximum Continuous 56 VDC (39 V ) RMS Voltage Maximum Input Ze

ページ16に含まれる内容の要旨

Notes: 16 VT1536A Isolated Digital Input/Output SCP


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