ページ1に含まれる内容の要旨
Jupiter 32
Miniature 20-channel
GPS receiver module
Integrator’s Manual
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LA000605D © 2007 Navman New Z
ページ2に含まれる内容の要旨
Contents 1.0 Introduction .......................................................................................................1 2.0 Hardware application information...................................................................1 2.1 Electrical connections (SMT pad interface) .................................................................. 2 2.2 Typical application circuit ............................................................................................. 3 2.2.1 Power for rece
ページ3に含まれる内容の要旨
Figures Figure 2-1: Jupiter 32 mechanical layout ............................................................................ 3 Figure 2-2: Basic Jupiter 32 application circuit ................................................................... 4 Figure 2-3: Example PCB layout for external active antenna ............................................. 4 Figure 2-4: Decoupling Capacitor Placement .................................................................... 5 Figure 2-5: Arrangement of activ
ページ4に含まれる内容の要旨
1.0 Introduction The Navman Jupiter 32 module is a complete GPS receiver designed for surface mount assembly integration. The Jupiter 32 provides a simple, cost effective GPS solution for application designers. Application integration will vary primarily with respect to antenna system design and EMI protective circuitry. The Jupiter 32 is the successor to the established Jupiter 30, being electrically compatible and having a very small form factor. The provides an easy migration path for exi
ページ5に含まれる内容の要旨
2.1 Electrical connections (SMT pad interface) The round hole on the front label side of the chip locates pad A1. The pads are designated A-F and 1-7. Details of the pad layout and numbering are shown in Figure 2-1. Pad No Pad Names Type Description A1 RF_IN I RF Input 50 ohm A2 GND P RF signal ground return A3 GND P ground A4 VANT P active antenna power input A5 GPIO15 I/O reserved A6 GPIO14 I/O reserved A7 RF_ON O output to indicate whether the RF section is enabled (active high) B1 GND P R
ページ6に含まれる内容の要旨
All dimensions in mm Figure 2-1: Jupiter 32 mechanical layout 2.2 Typical application circuit The schematic in Figure 2-2 (next page) represents a very basic application circuit, with simple interfaces to the module. It is subject to variations depending on application requirements. 2.2.1 Power for receiver and active antenna The receiver power connection requires a clean 3.3 VDC. Noise on this line may affect the performance of the GPS receiver. When an active antenna is used, the DC power is
ページ7に含まれる内容の要旨
F3 VCC_RF GND E2 F2 VBATT GND E1 GND C1 F1 PWRIN GND A3 A4 VANT Jupiter 32 Reference Design 3.0-3.6 V 10 nF Battery 1 nF 1 uF 1 uF 1 nF 10 nF Coaxial Connector N_GPS_FIX D4 50 ohm Microstrip TXA D7 See Section 2.5 A2 GND 10K 27 pF A1 RF_IN TP B1 GND RXA D5 Jupiter 32 10K 27 pF TP 1 PPS 1PPS E7 C4 BOOT 27 pF E5 N_RESET TP TXB F6 F4 WAKEUP TP RXB E6 Figure 2-2: Basic Jupiter 32 application circuit (Top) (Bottom) Figure 2-3: Example PCB layout for external active antenna LA000605D ©
ページ8に含まれる内容の要旨
2.2.3 Decoupling The schematic in Figure 2-2 illustrates a suggested method of decoupling that may be followed. Table 2-2 suggests decoupling values for all signals relative to the function required. This level of decoupling may not be required in a particular application, in which case these capacitors could be omitted. As shown in Figure 2-2, only the signal lines used in the application require decoupling. All capacitors are highly recommended if the module will experience substantial el
ページ9に含まれる内容の要旨
2.3.3 Decoupling components The recommended values for power and signal decoupling are shown in Table 2-2. The placement of these components must ensure that the low value capacitors have very short connections to the module pad and to the ground plane. Function Pad Decoupling PWRIN F1 1 µF||10 nF BOOT C4 27 pF RXA D5 27 pF TXA D7 27 pF TXB F6 27 pF RXB E6 27 pF RF_ON A7 27 pF VANT A4 1 nF VCC_RF F3 1 µF||1 nF VBATT F2 10 nF N_RESET E5 27 pF N_GPS_FIX D4 27 pF GPIO (ALL) - 27 pF WAKEUP F4 27
ページ10に含まれる内容の要旨
The modules can be used with a passive patch antenna if the connection to the antenna input is very short. It is possible to mount the patch antenna on the same PCB as the module, but to reduce the possibility of digital noise, it is recommended that the antenna be mounted on the opposite side of the board to the module. (Figure 2-6 shows an example of a PCB design integrating a passive patch antenna.) Figure 2-6: Cross section of application board with passive patch antenna 2.3.5 Design of
ページ11に含まれる内容の要旨
Notes: 1. If a multi-layer PCB is used, the thickness is the distance from signal track to nearest ground plane. 2. If the antenna connection is routed under the module, the track width should be approximately halved for that section only. It is recommended that the antenna connection PCB track should be routed around the outside of the module outline, kept on a single layer and have no bends greater than 45 degrees. It is not recommended (for production reasons) to route track under the mod
ページ12に含まれる内容の要旨
The features of each type of antenna are shown in Table 2-4, comparing an externally mounted active antenna with a passive patch antenna mounted on the same PCB as the module. Feature Passive antenna Active antenna antenna requires close proximity to receiver yes no consumes power no yes can be mounted remote from receiver no yes gives good performance in poor signal situations no yes has built in additional filtering no yes low cost yes no requires a coaxial connector no yes Table 2-4: Passiv
ページ13に含まれる内容の要旨
Characteristic Active antenna Passive antenna polarisation right-hand circular polarised right-hand circular polarised 1.57542 GHz 1.57542 GHz receive frequency L1 +/- 1.023 MHz > +/- 1.023 MHz power supply 3 V (typ), 5 V max. – DC current < 10mA at 3 VDC – +2 to 5 dBi with 1 dB loss (max) antenna gain – in connections total gain (includes ≤ 26 dBi (Jupiter 20) antenna gain, LNA – ≤18 dBi (Jupiter 32) gain and cable loss) axial ratio < 3 dB < 3 dB output VSWR < 2.5 – Table 2-5: Recommended
ページ14に含まれる内容の要旨
70 mA Antenna supply current limit L3 Q1 BC857B 120R @ 100 MHz SUPPLY_INPUT ANTENNA_SUPPLY 3-5 VDC (V_ANT) C9 200 mW 100nF C8 C7 100nF 18pF GND GND GND R10 Q2 BC857B 1K GND Figure 2-8: Simple current limiter circuit NOTE: Ensure that the In-rush current of your active antenna does not cause it to approach the current limit. Transistor Q1 serves as a series pass transistor. Q2 is used to sense the current in the antenna circuit, turning off Q1 if the voltage across the current sense resist
ページ15に含まれる内容の要旨
J2 J1 (on bottom side) (not loaded) Figure 2-10: Jupiter 32 adapter board Refer to Table 2-6 for a description of the connector interfaces. Jupiter function J2 (2.54 mm pitch header) pin no. VANT 1 no connection 2 VBATT 3 VDD 4 N_RESET 5 reserved 6 reserved 7 BOOT 8 reserved 9 RF_ON 10 TXA 11 RXA 12 reserved 13 TXB 14 RXB 15 WAKEUP 16 GND 17 reserved 18 1PPS 19 N_GPS_FIX 20 Table 2-6: Connector configuration LA000605D © 2007 Navman New Zealand. All rights reserved. Proprietary information and
ページ16に含まれる内容の要旨
3.0 Packaging and delivery Jupiter 32 modules are shipped in Tape and Reel form. The reeled modules are shipped with 250 units per reel. Each reel is ‘dry’ packaged and vacuum sealed in an Moisture Barrier Bag (MBB) with two silica gel packs and placed in a carton. All packaging is ESD protective lined. The Jupiter 32 GPS receiver is a Moisture Sensitive Device (MSD) level 3. Please follow the MSD and ESD handling instructions on the labels of the MBB and exterior carton. See Figures 3-1, 3-
ページ17に含まれる内容の要旨
250 per reel 44mm 20.00 4.00 2.00 1.75 44 Direction of Feed 3.2±0.10 0.35±0.05 13.30±0.10 All Dim in mm 17.3±0.10 Figure 3-3: Jupiter 32 Packaging LA000605D © 2007 Navman New Zealand. All rights reserved. Proprietary information and specifications subject to change without notice. 2.0 1.5 20.20
ページ18に含まれる内容の要旨
4.0 Manufacturing process recommendations The Jupiter 32 uses the latest Land Grid Array (LGA) technology. Solder interconnect is formed solely by solder paste applied to the board assembly. This results in a low stand-off height, depending on solder paste volume and Printed Circuit Board (PCB) geometry. This makes LGA ideal for small form-factor applications. Solder joint reliability studies indicate that LGA greatly exceed typical industry reliability. 4.1 Solder methods The Jupiter 32 ha
ページ19に含まれる内容の要旨
Pre-heat Heat Reflow Cool-down 260 Peak Temp. Liquidus Temp. Pb-free Solder Pb Solder 0 Time Sec 300 Figure 4-1: Sample Lead and Lead free reflow profile 4.1.5 Coating The final PCB may be selectively coated with an acrylic resin, air / oven cured conformal coating, clear lacquer or corresponding method, which gives electrical insulation and sufficient resistance to corrosion. 4.1.6 Post reflow washing It is recommended that a low residue solder paste is used to prevent the need for post reflo
ページ20に含まれる内容の要旨
on the part. The proper nozzle should also heat the component leads by either hot gas or hot bar. The ideal reflow profile should be the same as the one used for mounting the part and depends upon the paste used. The reflow zone can be shortened as long as the reflow is complete. The part should then be lifted off automatically during the transition from reflow to cool down cycles using a vacuum. 4.1.9 Site Redress and Cleaning Once the part is removed, the site needs to be cleaned for attac
