ページ1に含まれる内容の要旨
Service Manual
38 / 48 / 51 Cm Mono Colour Television
CHASSIS : CP-370
MODEL : 14Q1/20Q1/21Q1
14Q2/20Q2/21Q2
14Q3/20Q3/21Q4
14T1/20T1/21T1
14T2/20T2/21T2
14T3/20T3
@@
DAEWOO ELECTRONICS CO., LTD.
ページ2に含まれる内容の要旨
CONTENTS Specifications ................................................................................................................ 1 Safety Instruction ......................................................................................................... 2 Circuit block Diagram ................................................................................................. 3 Alignment Instructions ................................................................................
ページ3に含まれる内容の要旨
Specifications Q : 1SPEAKER MODEL, T : 2SPEAKER MODEL VM : WITHOUT TXT. MODEL, TM : WITH TXT. MODEL TV Standard PAL/SECAM-B/G, D/K, I, H, NTSC-3.58/4.43 Mains Voltage 100~250V AC, 50/60Hz Power Consumption 14”Q = 69W, 14”T = 74W 20”Q = 79W, 20”T = 84W 21”Q = 79W, 21”T = 84W Sound output . 1 Speaker : 3W( at 80% MOD. 10% THD) . 2 Speaker : 4W + 4W( at 80% MOD. 10% THD) Speaker . 1 Speaker : 3W, 16 ohm . 2 Speaker : 7.5W, 8 ohm(2EA) Antenna 75 ohm unbalanced Impedance
ページ4に含まれる内容の要旨
Safety Instruction WARNING: Before servicing this chassis, read the “X-RAY RADIATION precaution”, “safety precaution” and “product safety notice” below. X-RAY RADIATION PRECAUTION 1. Excessive high voltage can produce potentially voltage should be checked. It is recommended hazardous X-RAY RADIATION.To avoid such the reading of the high voltage recorded as a part hazards, the high voltage must not exceed the of the service records. it is important to use an specified limit. The nominal value of
ページ5に含まれる内容の要旨
Alignment Instructions 1. AFT 1.1 Standard B/G,D/K,I 1) Set a Signal Generator with - RF FREQUENCY = 38.9 MHz, - RF OUTPUT LEVEL = 80 5 dBuV - System = PAL / SECAM - B/G, D/K, I NTSC - 3.58/4.43 2) Connect the Signal Generator RF Output to P101 (Tuner IF Output). There must be no signal input to the tuner. 3) Press the “AFT” KEY and wait until the TV screen display “AFT OK”. 2. AGC 1) Set a Pattern Generator with RF LEVEL 63° 2 dBuV . 2) Connect a OSCILLOSCOPE PROBE to P102 (TUNER AGC INPU
ページ6に含まれる内容の要旨
6. GEOMETRY 6.1 VERTICAL CENTER 1) Set the TV to NOR I mode. 2) Pressing the V-SIZE UP/DOWN KEY, the lower half of the screen is blanked. 3) Adjust the border line of blanked picture coincident with the mechanical center marks of the CRT using the V-CENTER UP/DOWN KEY. 6.2 VERTICAL SIZE The VERTICAL CENTER adjustment has to be done in advance. 1) Apply a RETMA PATTERN signal. 2) Set the TV to NOR I mode. 3) Adjust the upper part of the picture with the V-SIZE UP/DOWN keys. 6.3 VERT
ページ7に含まれる内容の要旨
If EEPROM(1703) has been changed ; - Option data has to be changed and - all alignment function has to be readjusted. The initial state of adjustment are as follows; - V-Center, V-Slope V-Size, H-Center, R, G, B, AFT = Center (30/64 - 33/64) - S-Correction = 00/64 - AGC = 15~60/64 Service Remocon 6
ページ8に含まれる内容の要旨
IC Description DW370ASM* (Micro-controller for Non-Teletext Model) =TMS370C08A05 ( TI Type No.) (1) General Description The TMS370C08A05 devices are members of the cMCU370 family single-chip microcontrollers. The cMCU370 family provides cost effective real-time system control through use of the PRISM methodology. The PRISM methodology modular fabrication process integrates analog, digital, linear and power technologies on a single chip, thereby maximizing the total integration strategy. Th
ページ9に含まれる内容の要旨
• 09 CMOS Compatible I/O Pins - All Peripheral Function Pins Software Configurable for Digital I/O - 6 Bidirectionals, 3 Input Pins • Plastic 42 YSDP Pins Package (3) Block Diagram 8
ページ10に含まれる内容の要旨
DW5255M*(Micro-controller & West/East Teletext Decoder) DW5255RM*(Micro-controller & Cyrillic Teletext Decoder) =SDA5255-A*** (SIEMENS Type No.) (1) General Description The TDA5255 contains a slicer for VPS and TTX, an accelerating acquisition hardware module, a display generator for “LEVEL 1” TTX data and a 8 bit u-controller running at 333 nsec cycle time. The controller with dedicated hardware guarantees flexibility, does most of the internal processing of TTX acquisition , transfers data
ページ11に含まれる内容の要旨
• Controller: - 8 bit configuration - 18 MHz internal clock - 0.33 us instruction cycle - eight 16-bit data pointer registers (DPTR) - two 16-bit timers - watchdog timer - serial interface (UART) - 256 bytes on-chip RAM - 1 Kbyte on-chip extended RAM (access via MOVX) - 8 Kbyte on-chip ACQ-buffer-RAM (access via MOVX) - 6 channel 8-bit pulse width modulation unit - 2 channel 14-bit pulse width modulation unit - 4 multiplexed ADC inputs with 8-bit resolution - one 8-bit I/O port with open drain o
ページ12に含まれる内容の要旨
(4) Pin Description * A : DW5255M*/DW5255RM*, *B : DW370ASM* Pin Name Description Symbol A* B* A* B* A* B* 1 1 P3.1 T1IC1/CR SYS NTSC OUT for switching SAW filter K6259 - PAL/SECAM : L - NTSC : H 2 2 P0.7/Open Drain A0 BUSSTOP I2C BUS STOP IN for Computer controlled alignment in Factory ( Active Low ) 3 3 P0.6/Open Drain A1 SDA Serial data IN/OUT for I2C 4 4 P0.5/Open Drain A2 SCL Serial clock IN/OUT for I2C 5 5 P0.4/Open Drain A3 OPTION #5 #6 Teletext #6 6 6 P0.3/Open Drain A4 OPTION H
ページ13に含まれる内容の要旨
Pin Name Description Symbol A* B* A* B* A* B* 30CVBS CVBS CVBS IN 31 P2.3/8 bit ADC Not Used 32 22 P2.2/8 bit ADC B0/AN0/ADC AGC IF AGC INPUT for Auto Tuning System 33 23 P2.1/8 bit ADC B1/AN1/ADC KS Local KEY SCAN IN 34 24 P2.0/8 bit ADC B2/AN2/ADC S/SW Not Used 35 25 VSS VSS-OSD VSS Ground 36 26 P3.3/INT1 INT1 IR REMOTE IR IN 37 27 VDD VCC-OSD VDD Power Supply 38 28 LCIN OSCIN-OSD LCIN CLOCK IN for OSD 39 29 LCOUT OSCOUT-OSD LCOUT CLOCK OUT for OSD 40 30 P3.7/TXT I/O T2EVT/PWM2 BL BAND VHF
ページ14に含まれる内容の要旨
24LC08B (EEPROM) (1) Features • Single supply with operation down to 2.5V • Page-write buffer for up to 16 bytes • Low power CMOS technology • 2ms typical write cycle time for page-write - 1mA active current typical • Hardware write protect for entire memory - 10 A standby current typical at 5.5V • Can be operated as a serial ROM - 5 A standby current typical at 3.0V • Factory programming(QTP) available • Organized as two or four blocks of 256 bytes • ESD protection > 4,000V (2x256x8) and (4x256
ページ15に含まれる内容の要旨
TDA8374A (Single chip TV Processor for Negative modulation IF ) TDA8374 (Single chip TV Processor for Negative & positive modulation IF) (1) General Description The TDA8374(A) is I2C-bus controlled single chip TV processors which are intended to be applied in PAL/NTSC television receiver. The IC is mounted in a S-DIL 56 envelope. (2) Feature • IF - Vision IF amplifier with high sensitivity and good figures for differential phase and gain - PLL demodulator with high linearity offering the po
ページ16に含まれる内容の要旨
(3) Block Diagram 15
ページ17に含まれる内容の要旨
(4) Pin Description No Name Description 1 SOUND IF INPUT The sound equivalent input impedance is 8k5 ohm // 5pF which has to be taken into account for proper termination of the ceramic filters. The DC impedance is very high. The minimum input signal for catching is l mV rms. 2 EXT AUDIO INPUT An external sound signal (500mVrms) for example from SCART can be applied to this pin via a coupling capacitor. The input impedance is 25kohm. 3 VCO REF FILTER The IF VCO tuned circuit is applied to the
ページ18に含まれる内容の要旨
No Name Description A voltage detection circuit is connected to both pins. - pin12 if V12 <6.8V than a power on reset, POR, is generated. The Hout output is disabled immediate. - pin37 if V37 <5.8V than the horizontal output is disabled immediate. 13 INT CVBS INPUT It is recommended that the CVBS1 int and CVBS2 ext input amplitudes are 17 EXT CVBS INPUT 1 Vpp (inclusive sync amplitude). This, because the noise detector switches the 1 loop to slow mode (i.e. auto 1mode when FOA, FOB = 0,0)
ページ19に含まれる内容の要旨
No Name Description to the luminance input pin 27. The pin is internally AC coupled to the luminance clamp via a capacitor of 50pF; clamping action occurs during burstkey period. 28 LUMINANCE The luminance output signal is approximately l V black-white with typical OUTPUT output impedance of 25O ohm. 29 B-Y OUTPUT The maximum output impedance of pins 29 and 30 is 500 when PAL/NTSC 30 R-Y OUTPUT signals are identified. When SECAM is identified by the SECAM add-on and no PAL/NTSC is already ide
ページ20に含まれる内容の要旨
No Name Description A flash protection becomes active when this pin is forced >6V. The horizontal drive is switched-off immediately. Once the voltage is <6V the horizontal drive is switched-on again via the slow start procedure. 43 PHI-1 FILTER The loopfilter connected to pin 43 is suitable for various signal conditions as strong/weak and VCR signal. This is achieved by switching of the loopfilter time constant by changing the PHI-1 output current. Via I2C bus FOA/B, different time constant
