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REJ11J0021-0100
SH7137 CPU Board
M3A-HS37
32
User's Manual
Renesas 32-Bit RISC Microcomputer
SuperH RISC engineFamily/SH7137 Group
Rev. 1.00
Oct 09, 2008
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Table of Contents Chapter 1 Overview .............................................................................................................................1-1 1.1 Overview................................................................................................................................................................... 1-2 1.2 U System Configuration .......................................................................................................................
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3.3 M3A-HS37 Dimensions ............................................................................................................................................ 3-23 Appendix..............................................................................................................................................A-1 M3A-HS37 SCHEMATICS (ii) Rev.1.00 Oct 09, 2008 REJ11J0021-0100
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Chapter 1 Overview Chapter 1 Overview 1-1
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Overview 1 1.1 Overview 1.1 Overview The SH7137 CPU board (Part number: M3A-HS37) is designed for evaluating the feature and performance of the SH7137 group of Renesas Technology original MCU, as well as developing and evaluating the application software for the MCUs. SH7137 data bus, address bus and on-chip peripheral pins are all connected to the expansion connectors on the M3A-HS37 to allow for the timing analysis with peripherals that use measurement instruments and connections of M
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Overview 1 1.3 U External Specifications 1.3 External S U pecifications Table 1.3 3H .1 list the M3A-HS37 external specifications. Table 1.3.1 External Specifications No. Item Description SH7137 Input (XIN) clock: 10.0 MHz CPU clock: 80 MHz (max.) 1 CPU Bus clock: Maximum 40 MHz (max.) On-chip memory • Flash memory: 256 KB • RAM: 16 KB SRAM: 32 KB M5M5256DFP-70GI: 1 (8-bit bus width, optional) 2 Memory EEPROM: 16 KB (optional) 2 P HN58X24128FPIE: 1 (I P C bus connect
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Overview 1 1.4 U 1.4 U Appearance Figure 1.4 4H .1 shows the M3A-HS37 appearance. Figure 1.4.1 M3A-HS37 Appearance Rev.1.00 Oct 09, 2008 1-4 REJ11J0021-0100
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Overview 1 1.5 U M3A-HS37 Block Diagram 1.5 M3A-HS37 Block Diagr U am Figure 1.5 5H .1 shows the M3A-HS37 system block diagram. H-UDI connector Serial port (14-pin) connector SH7137 CPU board M3A-HS37 RS-232C driver H-UDI SCI RCAN connector Six user LEDs RCAN driver RCAN PIO (D-Sub 9-pin) SH7137 NMI INTC (80 MHz) switch ADC A/D connector IRQ2 PIO INTC 16 16 switch 2 I C BSC External bus 8 4 Maximum 40 MHz 8 DIP switches EEPROM SRAM (16 KB) (32 KB) (4/package) Expansion connector : Option
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Overview 1 1.6 U M3A-HS37 Major Components 1.6 U M3A-HS37 Major Components 6H Figure 1.6.1 shows the M3A-HS37 major components. Top view of the component side J4 SW1 JP11 J15 LED1 Power System power PE10/CS0# GND connector Power LED supply on/off switch jumper (optional) connector U9 U12 3.3V Regulator RCAN driver U4 J7 EEPROM DC Power jack (optional) JP1 J13 CPU power supply select RCAN jumper SRAM port connector JP2 to JP4 (optional) External power JP12,JP13 switch jumpers RCAN port
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Overview 1 1.6 U M3A-HS37 Major Components Table 7H 1.6.1 lists the major components on the M3A-HS37. Table 1.6.1 Main Components Mounted on the M3A-HS37 No. Name Part Number Manufacturer Remarks U1 CPU SH7137 Renesas U1 CPU socket NQPACK100SD(-ND) TET U2 SRAM M5M5256DFP-70GI Renesas Optional U4 EEPROM HN58X24128FPIE Renesas Optional U5 RS-232C driver SP3232ECA Sipex M51957BFP U6 Reset IC Renesas U9 3.3 V regulator LM2738YMY NS SW regulator U10 Inverter HD74LV2G14A Renesas
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Overview 1 1.7 U M3A-HS37 Memory Map 1.7 M3A-H U S37 Memory Map Figure 1.7 8H .1 and 9HFigure 1.7.2 show the memory map examples of SH7137 on the M3A-HS37. SH7137 logical space MCU Mode 3 M3A-HS37 (Single chip mode) Memory Map H'0000 0000 H'0000 0000 On-chip ROM (256 KB) On-chip ROM (256 KB) H'0003 FFFF H'0003 FFFF H'0004 0000 H'0004 0000 Reserved Reserved H'FFFF 7FFF H'FFFF 7FFF H'FFFF 8000 H'FFFF 8000 On-chip RAM (16 KB) On-chip RAM (16 KB) H'FFFF BFFF H'FFFF BFFF H'FFFF C000 H'FFFF C
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Overview 1 1.7 U M3A-HS37 Memory Map SH7137 logical space MCU mode 2 M3A-HS37 (On-chip ROM enable mode) Memory Map H'0000 0000 H'0000 0000 On-chip ROM (256 KB) On-chip ROM (256 KB) H'0003 FFFF H'0003 FFFF H'0004 0000 H'0004 0000 Reserved Reserved H'01FF FFFF H'01FF FFFF H'0200 0000 H'0200 0000 SRAM (32 KB) *1 H'0200 7FFF CS0 space H'0200 8000 User Area H'020F FFFF H'020F FFFF H'0210 0000 H'0210 0000 Reserved Reserved H'03FF FFFF H'03FF FFFF H'0400 0000 H'0400 0000 CS1 space User Area H'040
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Overview 1 1.8 U Absolute Maximum Ratings 1.8 U Absolute Maximum Ratings 10HTable 1.8.1 lists the absolute maximum ratings of the M3A-HS37. Table 1.8.1 Absolute Maximum Ratings of M3A-HS37 Symbol Parameter Rated Value Remarks Power supply voltage Reference voltage: VSS. Both VCC = 5 V and CPU-VCC -0.3 to 7.0 V 3.3 V allowed. power supply voltage Reference voltage: AVSS, for A/D converter AVCC ADC -0.3 to 7.0 V Operating temperature No dewdrops allowed. Topr 0 to 50 °C Stora
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Chapter 2Functional Specifications Chapter 2 Functional Specifications 2-1
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Functional Specifications 2 2.1 Features 2.1 Features The M3A-HS37 CPU board has function modules listed in Table 2.1.1. Table 2.1.1 lists the M3A-HS37 functional modules. Table 2.1.1 M3A-HS37 Functional Modules Section Features Description 2.2 CPU SH7137 • Input (XIN) clock: 10.0 MHz • CPU clock: 80 MHz (max.) • Bus clock: 40 MHz (max.) • Internal memory • Flash memory: 256 KB • RAM: 16 KB Memory • SRAM: 32 KB 2.3 M5M5256DFP-70GI: 1 (8-bit bus width, optional) • EEPROM
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Functional Specifications 2 2.2 CPU 2.2 CPU The M3A-HS37 is provided with the SH7137, the 32-bit RISC MCU operates with a maximum frequency of 80 MHz. The SH7137 MCU is provided with a 256-KB flash memory, and a 16-KB RAM, which covers a wide range of applications from data processing to equipment control. The M3A-HS37 can be operated with a maximum CPU frequency of 80 MHz (external bus 40 MHz at maximum) using a 10.0 MHz of the input clock. Figure 2.2.1 shows the SH7137 block diagra
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Functional Specifications 2 2.3 Memory 2.3 Memory 2.3.1 SH7137 Internal Memory The SH7137 MCU is provided with a 256-KB flash memory and a 16-KB RAM. 2.3.2 SRAM A 32-KB of SRAM can be mounted on the M3A-HS37 (optional). Both 5 V and 3.3 V can be supplied for the CPU and the SRAM on the M3A-HS37. The supply voltage supplied to the CPU is also supplied to SRAM. When M5M5256DFP-70GI is mounted as SRAM, the supply voltage is automatically the same as the CPU. The SRAM is controlled b
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Functional Specifications 2 2.3.3 EEPROM 2.3.3 EEPROM 2 A 16-KB of the EEPROM can be mounted on the M3A-HS37. The EEPROM is controlled by the SH7137 on-chip I C bus interface. Table 2.3.3 lists the EEPROM specifications. Figure 2.3.2 shows the connection circuit block diagram of SH7137 and EEPROM. Table 2.3.3 EEPROM Specifications Part Number Interface Capacity Package 2 * HN58X24128FPIE 2-wire system serial (I C bus) 16 KB 8-pin SOP SH7137 (optional) CPU-VCC HN58X24128FPIE 0 S
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Functional Specifications 2 2.4 Serial Port Interface 2.4 Serial Port Interface SH7137 SCI0 or SCI 1 pins can be connected to the serial port connector on the M3A-HS37 (default: PE1 pin and PE2 pin are connected to the serial port connector, J3). The serial port switch jumpers (JP7, JP8, JP9, and JP10) switch the SCI channels connected to a serial port connector. Figure 2.4.1 shows the serial port block diagram on the M3A-HS37, and Table 2.4.1 lists the jumper connections. Serial port
