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Diversified Technology, Inc.
CPB4612
Configuration and Maintenance
Guide
Rev 1.2
CPB4612 CPCI Board
with a Intel® Pentium® M
© Copyright 2005 by Diversified Technology, Inc. All rights reserved. Printed in the
United States of America. No part of this publication may be reproduced, stored in a
retrieval system, or transmitted, in any form or by any means, electronic,
mechanical, photocopying, recording, or otherwise without prior permissi
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CPB4612 Configuration and Maintenance Guide Return Shipment Information If service or repair is required, contact DTI’s Service Department for a Return Material Authorization (RMA) number and shipping instructions. If the product is out of warranty, or was damaged during shipment, a purchase order will be required for the repair. The product should be returned in its original shipping materials. Contact DTI if replacement material is required. Seal the carton securely and ship prepaid t
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CPB4612 Configuration and Maintenance Guide For Your Safety CAUTION: The cPB-4612 contains a lithium battery. This battery is not field-replaceable. There is a danger of explosion if the battery is incorrectly replaced or handled. Do not disassemble or recharge the battery. Do not dispose of the battery in fire. When the battery is replaced, the same type or an equivalent type recommended by the manufacturer must be used. Used batteries must be disposed of according to the manufact
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CPB4612 Configuration and Maintenance Guide Revision History Date Revision Summary of Corrections 08/31/04 1.0 Initial Release 10/12/04 1.1 Added links throughout manual. 8/19/05 1.2 Removed references to ethernet signal routing. Update BIOS Section iv
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CPB4612 Configuration and Maintenance Guide Table of Contents Return Shipment Information...................................................................................................................................ii For Your Safety ...................................................................................................................................................... iii Revision History......................................................................................
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CPB4612 Configuration and Maintenance Guide 2.8 Operating System Installation...........................................................................................................................17 3 CONFIGURATION.................................................................................................... 19 3.1 Switch Descriptions ............................................................................................................................................21 3.1.1 P
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CPB4612 Configuration and Maintenance Guide 7.3.2 Preload Value 2 (BAR+04h)..............................................................................................................................35 7.3.3 General Interrupt Status (BAR+08h) .................................................................................................................36 7.3.4 Reload Register (BAR+0Ch) ........................................................................................................
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CPB4612 Configuration and Maintenance Guide B.2 J15 (CompactPCI Bus Connector)....................................................................................................................71 B.3 J11 (CompactPCI Bus Connector)....................................................................................................................72 B.4 J8 (CompactPCI Connector)......................................................................................................................
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CPB4612 Configuration and Maintenance Guide Tables Jumper Cross-Reference Table........................................................................................................................ 20 Connector Assignments.................................................................................................................................... 68 J15 CompactPCI Bus Connector Pin out....................................................................................................
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CPB4612 Configuration and Maintenance Guide Document Organization This document describes the operation and use of the CPB-4612 Computer Processor Board with an Intel® Pentium® M. The following topics are covered in this document. Chapter 1, "Introduction," introduces the key features of the CPB-4612. This chapter includes a product definition, a list of product features, and a functional block diagram with a brief description of each block. This chapter can be used to compare the features
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Chapter 1 1 1 Introduction This chapter provides an introduction to the CPB-4612 including a product definition, a list of product features, and a functional block diagram with descriptions of each block. The "cPB-4612 Faceplate" illustration identifies the connectors, indicators, and switches available on the cPB-4612's faceplate. Optional rear-panel transition boards are available to extend various faceplate features to a system's rear-panel. For more information about compatible
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1.1 Product Definition The cPB-4612 Computer Processor Board is a single board computer designed to work as a modular ® ® component in a CompactPCI system. It utilizes the Intel Pentium M processor in a micro FCBGA package along with dual Gigabit Ethernet controllers and the latest in memory and I/O technology to provide an inexpensive, yet fast and reliable PICMG 2.16 board. The cPB-4612 is CompactPCI Packet Switching Backplane (CompactPCI/PSB) compatible and draws its power from the J
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CPB-4612 Faceplate Ejector Handle 10/100 Ethernet COM RS-232 Serial Port USB PMC PMC Reset Switch Hotswap LED Ejector Handle 3
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1.2 Features There are two SKU's of the cPB-4612. The first is the cPB-4612, which has a 64bit/66Mhz PMC site and a 32bit/33Mhz PMC site. . The second is the cPB-4612 w/ IDE, which has a 64bit/66Mhz PMC site and an on-board 2.5” HDD IDE connector. Other features include: • CompactPCI Specification, PICMG 2.0, Version 2.1** compliant • CompactPCI Specification, PICMG 2.16, Version 1.0** compliant • 6U single-slot CompactPCI form factor • Mobile Intel Pentium M, micro FCBGA package
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Functional Block Diagram 1.3.1 CompactPCI/PSB Architecture The cPB-4612 is designed to operate in a PICMG 2.0 CompactPCI backplane. If the system is placed in a system slot, the bridge will automatically configure itself as a transparent bridge, and the board will perform as the host. If the board is placed in a peripheral slot, the bridge will automatically configure itself as a non- transparent bridge, and the board will perform as a peripheral device. When used in accordance with
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system's fabric-switched Link Ports A and B, and can be inserted into system or peripheral slots. The cPB- 4612 is keyed for insertion into compatible slots. The "CompactPCI" topic in Appendix D contains a link to the PCI Industrial Computer Manufacturers Group. 1.3.2 Processor The cPB-4612 uses the Mobile Pentium M in a micro FCBGA package. The 1MB or 2MB on-die transfer L2 cache is integrated with the CPU, eliminating the need for separate components and improving performance. The FCB
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1.3.5 Memory and I/O Addressing The cPB-4612 supports up to 2GB of DDR333/266/200 via two right-angled SODIMM sockets. Memory can be purchased from DTI separately. See the "Memory Configuration" and "I/O Configuration" topics in Chapter 2 for more information. 1.3.6 Power Ramp Circuitry The cPB-4612 features a power controller with power ramp circuitry that allows the board's voltages to be ramped in a controlled fashion. The power ramp circuitry eliminates large voltage or current s
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Access Controller (MAC) and the physical layer (PHY) interface combined into a single component solution. Both Ethernet Channels are directed to the rear connector at J3 for PICMG 2.16 support. The "Ethernet" topic in Appendix D contains links to the datasheets for the Ethernet devices used on the cPB-4612. 1.3.11 10/100 Ethernet Interface The cPB-4612 supports one 10/100 Base-TX Ethernet interface. The Intel 82559EM Ethernet controller provides this interface. The NIC address progra
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• Real-Time Clock • On-board PCI devices Enhanced capabilities include the ability to configure each interrupt level for active high-going edge or active low-level inputs. The cPB-4612's interrupt controllers reside in the 6300ESB device. The "Intel 855GME Chipset" topic in Appendix D provides a link to the datasheet for this device. 1.3.15 Counter/Timers Three 8254-style counter/timers, as defined for the PC/AT, are included on the cPB-4612. Operating modes supported by the counter/
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1.3.20 Universal Serial Bus (USB) The Universal Serial Bus (USB) provides a common interface to slower-speed peripherals. Functions such as keyboard, serial ports, printer port, and mouse ports can be consolidated into USB, simplifying cabling requirements. The cPB-4612 provides one USB port at its faceplate (connector J20 is Port 0). USB Port 1 and USB port 2 are routed to the cPB-4612’s J5 Rear Panel I/O connector. The cPB-4612’s USB channels are controlled by the Intel 6300ESB devic
