Instruction d'utilisation Renesas HD74LV2GT66A

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HD74LV2GT66A
2–channel Analog Switch
REJ03D0145–0200Z
(Previous ADE-205-698A (Z))
Rev.2.00
Oct.17.2003
Description
The HD74LV2GT66A has 2–channel analog switch in an 8 pin package. Each switch section has its own
enable input control (C). High-level voltage applied to C turns on the associated switch section.
Applications include signal gating, chopping, modulation, or demodulation (modem), and signal
multiplexing for analog to digital and digital to analog conversion systems. Low voltage and

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HD74LV2GT66A Outline and Article Indication  HD74LV2GT66A Index band Lot No. Y M W Y : Year code (the last digit of year) M : Month code W : Week code T 6 6 SSOP–8 Marking Function Table Control Switch LOFF HON H : High level L : Low level Rev.2.00, Oct.17.2003, page 2 of 9

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HD74LV2GT66A Pin Arrangement 1 IN / OUT1 8V CC 2 OUT / IN1 7 CONT1 3 CONT2 6 OUT / IN2 GND 4 5 IN / OUT2 (Top view) Absolute Maximum Ratings Item Symbol Ratings Unit Test Conditions Supply voltage range V –0.5 to 7.0 V CC *1 Input voltage range V –0.5 to 7.0 V I *1, 2 Output voltage range V –0.5 to V + 0.5 V Output : H or L O CC Input clamp current I –20 mA V < 0 IK I Output clamp current I ±50 mA V < 0 or V > V OK O O CC Continuous output current I ±25 mA V = 0 to V O O CC Continuous current th

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HD74LV2GT66A Recommended Operating Conditions Item Symbol Min Max Unit Conditions Supply voltage range V 3.0 5.5 V CC Input voltage range V 05.5 V I Input / output voltage range V 0V V I/O CC Input transition rise or fall rate ∆ t / ∆ v 0 100 ns / V V = 3.0 to 3.6 V CC 020 V = 4.5 to 5.5 V CC Operating free-air temperature T –40 85 °C a Note: Unused or floating control inputs must be held high or low. Electrical Characteristics T = 25°C T = –40 to 85°C a a Item Symbol V (V) Unit Test Conditions

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HD74LV2GT66A Switching Characteristics • V = 3.3 ± 0.3 V CC Ta = 25°C Ta = –40 to 85°C Test FROM TO Item Symbol Unit Conditions (Input) (Output) Min Typ Max Min Max Propagation t — 1.5 6.0 — 10.0 ns C = 15 pF IN/OUT OUT/IN PLH L delay time t or OUT/IN or IN/OUT PHL — 4.0 9.0 — 12.0 C = 50 pF L Enable time t — 4.0 11.0 — 15.0 ns C = 15 pF C IN/OUT ZH L t or OUT/IN ZL — 6.0 18.0 — 22.0 C = 50 pF L Disable time t — 5.0 11.0 — 15.0 ns C = 15 pF C IN/OUT HZ L t or OUT/IN LZ — 8.0 18.0 — 22.0 C = 50 p

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HD74LV2GT66A Test Circuit  R ON V CC V =V CIH V CC V IN–OUT V =V (ON) V R = (Ω) IN CC OUT ON –3 10 GND 1.0 mA + − V V V IN – OUT  I (off), I (on) SS V V CC CC V =V V =V CIL CIH V V CC CC A (OFF) A (ON) V =GND V V =V V =V OUT OUT IN CC IN CC GND GND or V OPEN or GND or GND CC Rev.2.00, Oct.17.2003, page 6 of 9

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HD74LV2GT66A t t r f V I 90% 90%  t ,t V PLH PHL IN Vref Vref 10% 10% t PLH GND V t CC PHL V OH V =V CIH V OUT 50% 50% V OL V CC INPUTS V (ON) V V (V) Vref IN OUT CC V t / t I r f C = GND L 3.3±0.3 2.5 V ≤ 3.0 ns 50% 15 or 50 pF 5.0±0.5 3 V ≤ 3.0 ns 1.5 V Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω . 2. The output are measured one at a time with one transition per measurement.  t ,t / t ,t ZH ZL HZ LZ t t r f V CC V I 90% 90% V

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HD74LV2GT66A  C , C IN/OUT IN–OUT C IN–OUT V CC V =GND C V CC (OFF) GND C C IN/OUT IN/OUT Rev.2.00, Oct.17.2003, page 8 of 9

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HD74LV2GT66A Package Dimensions 2.0 ± 0.2 Unit: mm 1.5 ± 0.2 (0.5) (0.5) (0.5) + 0.1 8 − 0.2 − 0.05 Package Code TTP–8DBV JEDEC  JEITA  Mass (reference value) 0.010 g Rev.2.00, Oct.17.2003, page 9 of 9 (0.17) 2.3 ± 0.1 0.7 ± 0.1 (0.4) (0.4) 3.1 ± 0.3 0 − 0.1 + 0.1 0.13 − 0.05

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Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appr