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User’s Guide
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OME-PIO-D56/D24
PCI-Bus Digital I/O Board
Hardware Manual
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® OMEGAnet Online Service Internet e-mail www.omega.com info@omega.com Servicing North America: USA: One Omega Drive, P.O. Box 4047 ISO 9001 Certified Stamford CT 06907-0047 TEL: (203) 359-1660 FAX: (203) 359-7700 e-mail: info@omega.com Canada: 976 Bergar Laval (Quebec) H7L 5A1, Canada TEL: (514) 856-6928 FAX: (514) 856-6886 e-mail: info@omega.ca For immediate technical or application assistance: ® USA and Canada: Sales Service: 1-800-826-6342 / 1-800-TC-OMEGA ® Customer Service: 1-800-622-2378
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OME-PIO-D56/D24 User Manual OME-PIO-D56/OME-PIO-D24 User Manual (Ver.2.1, Oct/2003) ---- 1
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Table of Contents 1. INTRODUCTION...........................................................................................................................3 1.1 FEATURES ....................................................................................................................................3 1.2 SPECIFICATIONS ...........................................................................................................................4 1.3 ORDER DESCRIPTION............
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1. Introduction The OME-PIO-D56/OME-OME-PIO-D24 provides 56/24 TTL digital I/O lines. The OME-PIO-D56/OME-OME-PIO-D24 consists of one 24-bit bi-directional port, one 16-bit input port and one 16-bit output port (only for OME-PIO-D56). The 24-bit port supports three 8-bit groups PA, PB & PC. Each 8-bit group can be individually configured to function as either an input or an output. All groups using 24-bit bi- directional ports are configured as inputs upon power-up or reset. Use the OME
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1.2 Specifications • All inputs are TTL compatible Logic high voltage : 2.4V (Min.) Logic low voltage : 0.8V (Max.) • All outputs are TTL compatible OPTO-22 output (CON3) Sink current : 64mA (Max.) Source current : 32mA(Max.) 16-channel output (CON1) Sink current : 8mA (Max.) Source current : 0.4mA(Max.) • Environmental : Operating Temperature: 0 °C to 60 °C Storage Temperature: -20 °C to 80 °C Humidity: 0 to 90% non-condensing • Dimensio
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1.4 PCI Data Acquisition Family We provide a family of PCI bus data acquisition cards. These cards can be divided into three groups as follows: 1. OME-PCI-series: first generation, isolated or non-isolated cards OME-PCI-1002/1202/1800/1802/1602: multi-function family, non-isolated OME-PCI-P16R16/P16C16/P16POR16/P8R8: D/I/O family, isolated OME-PCI-TMC12: timer/counter card, non-isolated 2. OME-PIO-series: cost-effective generation, non-isolated cards OME-PIO-823/821: multi-function
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PIO-D56 CON3 only for PIO-D56 PIO-D24 CON2 20 19 D/I DI/O 2 1 Port0 Port1 CON1 20 19 Port2 D/O 2 1 PCI BUS 2. Hardware configuration 2.1 Board Layout OME-PIO-D56/PIO-D24 User Manual (Ver.2.1, Oct/2003, PPH-005-21) ---- 6
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2.2 I/O Port Location The OME-PIO-D56/OME-PIO-D24 consists of one 24-bit bi-directional port, one 16 bit input port and one 16 bit output port (only for OME-PIO-D56). The 24-bit port supports three 8-bit groups: PA, PB & PC. Each 8-bit group can be individually configured to function as either inputs or outputs. All groups using 24-bit bi- directional ports are configured as inputs upon power-up or reset. The I/O port locations are as follows: Connector of PA0 ~ PA7 PB0
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I/O select (Sec. 3.3.7) RESET\ (Sec. 3.3.1) disable\ D/I/O Data input Latch (Sec. 3.3.8) Clock input D/O latch CKT disable Data Buffer input (Sec. 3.3.8) Clock input D/I buffer CKT • When the RESET\ is in Low-state all D/I/O operations are disabled • When the RESET\ is in High-state all D/I/O operation are enabled. • If D/I/O is configured as D/I port D/I= external input signal
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2.3.2 DI Port Architecture (CON2) When the PC is powered up, all DI (CON2) port operations are disabled. The RESET\ signal controls the enable/disable signal for the DI port. Refer to Sec. 3.3.1 for more information about the RESET\ signal. • The RESET\ is in Low-state all DI operations are disabled • The RESET\ is in High-state all DI operations are enabled RESET\ disable Data CON2 Buffer input Clock input D/I buffer CKT OME-PIO-D56/OME-PIO-D24 User M
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2.3.3 DO Port Architecture (CON1) When the PC is powered up, all DO port (CON1) operations are disabled. The RESET\ signal controls the enable/disable signal for the DI port. Refer to Sec. 3.3.1 for more information about the RESET\ signal. • The RESET\ is in Low-state all DO operations are disabled • The RESET\ is in High-state all DO operations are enabled The power-up states are as follows: • All DO operations are disabled • All output latches are cleared to Low-Level
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2.4 Interrupt Operation All PC0, PC1, PC2 and PC3 can be used as an interrupt signal sources. Refer to Sec. 2.1 for PC0/PC1/PC2/PC3 location. The interrupt of OME-PIO-D56/OME- PIO-D24 is level-trigger & Active_High. The interrupt signal can be programmed to inverted or non-inverted state. The programming procedure is given as follows: 1. Make sure the initial level is High or Low 2. If the initial state is High select the inverted signal (Sec. 3.3.6) 3. If the initial state is Low s
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2.4.1 Interrupt Block Diagram of OME-PIO- D56/D24 INT_CHAN_0 INT_CHAN_1 INT\ INT_CHAN_2 Level_trigger INT_CHAN_3 initial_low active_high The interrupt output signal of OME-PIO-D56/OME-PIO-D24, INT\ is Level_trigger & Active_Low. If the INT\ generates a low pulse, the OME-PIO- D56/OME-PIO-D24 will interrupt the PC only once. If the INT\ is fixed in low level, the OME-PIO-D56/OME-PIO-D24 will interrupt the PC continuously. INT_CHAN_0/1/2/3 must be controlled in a
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2.4.2 INT_CHAN_0/1/2/3 INT_CHAN_0 (1/2/3) PC0(PC1/PC2/PC3) Inverted/Noninverted select INV0(1/2/3) Enable/Disable select EN0(1/2/3) The INT_CHAN_0 must normally be fixed in low level state and generate a high pulse to interrupt the PC. The EN0 (EN1/EN2/EN3) can be used to enable/disable the INT_CHAN_0(1/2/3) as follows : (Refer to Sec. 3.3.4) EN0 (1/2/3) = 0 → INT_CHAN_0(1/2/3) = disable EN0 (1/2/3) = 1 → INT_CHAN_0(1/2/3) = enable The INV0 c
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2.4.3 Initial_high, active_low Interrupt source If the PC0 is a initial_high, active_low signal, the interrupt service routine should use INV0 to invert/non-invert the PC0 for high_pulse generation as follows: (Refer to DEMO4.C) Initial setting: now_int_state=1; /* initial state for PC0 */ outportb(wBase+0x2a,0); /* select the inverted PC0 */ void interrupt irq_service() { if (now_int_state==1) /* now PC0 is changed to LOW */(a) {
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2.4.4 Initial_low, active_high Interrupt source If the PC0 is a initial_low, active_high signal, the interrupt service routine should use INV0 to inverted/non-inverted the PC0 for high_pulse generation as follows: (Refer to DEMO3.C) Initial setting: now_int_state=0; /* initial state for PC0 */ outportb(wBase+0x2a,1); /* select the non-inverted PC0 */ void interrupt irq_service() { if (now_int_state==1) /* now PC0 is changed to LOW */(c
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2.4.5 Muliti-Interrupt Source Assume: PC0 is initial Low, active High, PC1 is initial High, active Low PC2 is initial Low, active High PC3 is initial High, active Low as follows : PC0 PC1 PC2 PC3 PC0 & PC1 are PC0 & PC1 are active at the same return to normal time. at the same time. PC2 & PC3 are PC2 & PC3 are return to normal at active at the same the same time. ti
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void interrupt irq_service() { new_int_state=inportb(wBase+7)&0x0f; /* read all interrupt state */ int_c=new_int_state^now_int_state; /* compare which interrupt */ /* signal be change */ if ((int_c&0x1)!=0) /* INT_CHAN_0 is active */ { if ((new_int_state&0x01)!=0) /* now PC0 change to high */ { CNT_H1++; } else /* now PC0 change to low */
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2.5 Daughter Boards 2.5.1 OME-DB-37 The OME-DB-37 is a general purpose daughter board for D-sub 37 pins, designed for an easy-wiring connection. 2.5.2 OME-DN-37 The OME-DN-37 is a general purpose daughter board for OME-DB-37 with DIN- Rail Mounting. It is designed for easy-wiring connection.. 37pin cable OME-DN-37 2.5.3 OME-DB-8125 The OME-DB-8125 is a general purpose screw terminal board. It is designed for easy wire connection. There i
