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®
MoBL CY62128E
1-Mbit (128K x 8) Static RAM
Features Functional Description
[1]
■ Very high speed: 45 ns The CY62128E is a high performance CMOS static RAM
organized as 128K words by 8 bits. This device features
■ Temperature ranges
advanced circuit design to provide ultra low active current. This
®
❐ Industrial: –40°C to +85°C
is ideal for providing More Battery Life™ (MoBL ) in portable
❐ Automotive-A: –40°C to +85°C
applications such as cellular telephones. The device also has an
❐ Automotiv
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® MoBL CY62128E [2] Pin Configuration A 1 32 11 OE A 2 31 A 9 10 3 A 30 8 CE 1 4 A 29 IO 13 7 32-Pin SOIC 5 28 WE IO 6 CE 6 27 2 IO 5 Top View 7 A TSOP I 26 15 IO 4 8 Top View 25 V IO CC 3 (not to scale) 24 NC 9 GND V 1 CC NC 32 A 10 23 IO 16 2 A A 22 IO A 11 16 2 31 15 14 1 A 21 IO A 12 12 0 CE 14 3 30 2 A A 13 20 7 0 A 12 4 29 WE A A 14 19 6 1 A A 18 A 7 5 28 A 15 2 13 5 A A A 16 17 6 A 3 6 27 8 4 A A 5 7 26 9 A A 4 8 25 11 A 3 9 24 OE A 2 10 A A 23 11 24 OE 10 25 A A 23 9 A 1 11 22 26 10 CE 1
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® MoBL CY62128E Output Current into Outputs (LOW)............................. 20 mA Maximum Ratings Static Discharge Voltage........................................... > 2001V Exceeding maximum ratings may impair the useful life of the (MIL-STD-883, Method 3015) device. These user guidelines are not tested. Latch up Current..................................................... > 200 mA Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Operating Range
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® MoBL CY62128E [9] Thermal Resistance SOIC STSOP TSOP Parameter Description Test Conditions Unit Package Package Package Θ Thermal Resistance Still Air, soldered on a 3 × 4.5 inch, 48.67 32.56 33.01 °C/W JA (Junction to Ambient) two-layer printed circuit board Θ Thermal Resistance 25.86 3.59 3.42 °C/W JC (Junction to Case) AC Test Loads and Waveform R1 ALL INPUT PULSES V CC OUTPUT 3.0V 90% 90% 10% 10% R2 GND 30 pF Rise Time = 1 V/ns Fall Time = 1 V/ns INCLUDING JIG AND Equivalent to: THEVENIN E
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® MoBL CY62128E [12] Switching Characteristics (Over the Operating Range) 45 ns (Ind’l/Auto-A) 55 ns (Auto-E) Parameter Description Unit Min Max Min Max Read Cycle t Read Cycle Time 45 55 ns RC t Address to Data Valid 45 55 ns AA t Data Hold from Address Change 10 10 ns OHA t CE LOW and CE HIGH to Data Valid 45 ns 55 ACE 1 2 t OE LOW to Data Valid 22 ns 25 DOE [13] t OE LOW to Low-Z 5 ns 5 LZOE [13, 14] t OE HIGH to High-Z 18 ns 20 HZOE [13] t CE LOW and CE HIGH to Low-Z 10 ns 10 LZCE 1 2 [13
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® MoBL CY62128E Switching Waveforms [16, 17] Figure 1. Read Cycle 1 (Address Transition Controlled) tRC RC ADDRESS t AA t OHA DATA OUT PREVIOUS DATA VALID DATA VALID [11, 17, 18] Figure 2. Read Cycle No. 2 (OE Controlled) ADDRESS t RC CE t ACE OE t HZOE t DOE t HZCE t LZOE HIGH IMPEDANCE HIGH IMPEDANCE DATA VALID DATA OUT t LZCE t PD t I V PU CC CC SUPPLY 50% 50% CURRENT I SB [11, 15, 19, 20] Figure 3. Write Cycle No. 1 (WE Controlled) t WC ADDRESS t SCE CE t t AW HA t t SA PWE WE OE t SD
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® MoBL CY62128E Switching Waveforms (continued) [11, 15, 19, 20] Figure 4. Write Cycle No. 2 (CE1 or CE2 Controlled) t WC ADDRESS t SCE CE t SA t t AW HA t PWE WE t t SD HD DATA IO DATA VALID [11, 20] Figure 5. Write Cycle No. 3 (WE Controlled, OE LOW) t WC ADDRESS t SCE CE t t AW HA t t SA PWE WE t t SD HD 21 NOTE DATA VALID DATA IO t t LZWE HZWE Truth Table CE CE WE OE Inputs/Outputs Mode Power 1 2 H X X X High-Z Deselect/Power down Standby (I ) SB X L X X High-Z Deselect/Power down Standb
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® MoBL CY62128E Ordering Information Speed Package Operating Ordering Code Package Type (ns) Diagram Range 45 CY62128ELL-45SXI 51-85081 32-pin 450-Mil SOIC (Pb-free) Industrial CY62128ELL-45ZAXI 51-85094 32-pin STSOP (Pb-free) CY62128ELL-45ZXI 51-85056 32-pin TSOP Type I (Pb-free) 45 CY62128ELL-45SXA 51-85081 32-pin 450-Mil SOIC (Pb-free) Automotive-A CY62128ELL-45ZXA 51-85056 32-pin TSOP Type I (Pb-free) 55 CY62128ELL-55SXE 51-85081 32-pin 450-Mil SOIC (Pb-free) Automotive-E CY62128ELL-55ZAXE 5
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® MoBL CY62128E Figure 7. 32-pin Shrunk Thin Small Outline Package (8 x 13.4 mm) (51-85094) 51-85094-*D Document #: 38-05485 Rev. *F Page 9 of 12 [+] Feedback
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® MoBL CY62128E Figure 8. 32-pin Thin Small Outline Package Type I (8 x 20 mm) (51-85056) Document #: 38-05485 Rev. *F Page 10 of 12 [+] Feedback
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® MoBL CY62128E Document History Page ® Document Title: CY62128E MoBL 1-Mbit (128K x 8) Static RAM Document Number: 38-05485 Submission Orig. of Revision ECN Description of Change Date Change ** 203120 See ECN AJU New data sheet *A 299472 See ECN SYT Converted from Advance Information to Preliminary Changed t from 6 ns to 10 ns for both 35 ns and 45 ns, respectively OHA Changed t from 15 ns to 18 ns for 35 ns speed bin DOE Changed t , t from 12 and 15 ns to 15 and 18 ns for the 35 and 45 ns HZ
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® MoBL CY62128E Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress.com/sales. Products PSoC Solutions PSoC psoc.cypress.com General psoc.cypress.com/solutions Clocks & Buffers clocks.cypress.com Low Power/Low Voltage psoc.cypress.com/low-power Wireless wireless.cypress.com Precision Analog
