Inhaltszusammenfassung zur Seite Nr. 1
CY7C68023/CY7C68024
EZ-USB NX2LP™ USB 2.0 NAND
Flash Controller
• 43-mA Typical Active Current
1.0 Features
• Space-saving and lead-free 56-QFN package (8 mm ×
• High (480-Mbps) or full (12-Mbps) speed USB support
8mm)
• Both common NAND page sizes supported
• Support for board-level manufacturing test via USB
— 512bytes—Up to 1 Gbit Capacity
interface
— 2K bytes—Up to 8 Gbit Capacity
• 3.3V NAND Flash operation
• 8 chip enable pins
• NAND Flash power management support
— Up to 8 NAND Flash
Inhaltszusammenfassung zur Seite Nr. 2
CY7C68023/CY7C68024 3.0 Pin Assignments 3.1 Pin Diagram R_B1# 1 42 RESET# R_B2# 2 41 GND AVCC 3 40 N/C XTALOUT 4 39 N/C XTALIN 5 38 WP_SW# AGND 6 37 WP_NF# AVCC 7 EZ-USB NX2LP 36 LED2# DPLUS 8 35 LED1# 56-pin QFN DMINUS 9 34 ALE AGND 10 33 CLE VCC 11 32 VCC GND 12 31 RE1# N/C 13 30 RE0# GND 14 29 WE# Figure 3-1. 56-pin QFN 3.2 Pin Descriptions Pin Name Type Default State at Start-up Description [1] 1 R_B1# I Z Ready/Busy 1 (2.2k to 4k pull-up resistor is required) 2 R_B2# I Z Ready/Busy 2 (2.
Inhaltszusammenfassung zur Seite Nr. 3
CY7C68023/CY7C68024 3.2 Pin Descriptions (continued) Pin Name Type Default State at Start-up Description 16 Reserved N/A N/A Must be tied HIGH (no pull-up resistor required) 17 VCC PWR PWR 3.3V supply 18 DDO I/O Z Data 0 19 DD1 I/O Z Data 1 20 DD2 I/O Z Data 2 21 DD3 I/O Z Data 3 22 DD4 I/O Z Data 4 23 DD5 I/O Z Data 5 24 DD6 I/O Z Data 6 25 DD7 I/O Z Data 7 26 GND GND GND Ground 27 VCC PWR PWR 3.3V supply 28 GND GND GND Ground 29 WE# O H Write enable 30 RE0# O H Read Enable 0 31 RE1# O H
Inhaltszusammenfassung zur Seite Nr. 4
CY7C68023/CY7C68024 step on each falling edge of the Read Enable pulse. A 10k pull- 3.3 Additional Pin Descriptions up is an option For RE1-0#. 3.3.1 DPLUS, DMINUS 3.3.7 CLE DPLUS and DMINUS are the USB signaling pins, and they The Command Latch Enable output pin is used to indicate that should be tied to the D+ and D– pins of the USB connector. the data on the I/O bus is a command. The data is latched into Because they operate at high frequencies, the USB signals the NAND Flash control regis
Inhaltszusammenfassung zur Seite Nr. 5
CY7C68023/CY7C68024 A unique USB serial number is required for each device in 4.0 Applications order to comply with the USB Mass Storage specification. The NX2LP is a high-speed USB 2.0 peripheral device that Also, Cypress requires designers to use their own Vendor ID connects NAND Flash devices to a USB host using the USB for final products. The Vendor ID is obtained through regis- Mass Storage Class protocol. tration with the USB Implementor’s Forum (USB-IF), and the Product ID is determined
Inhaltszusammenfassung zur Seite Nr. 6
CY7C68023/CY7C68024 Table 6-1. Variable Configuration Data And Default ROM Values Configuration Data Description Default ROM Value Vendor ID USB Vendor ID (Assigned by USB-IF) 0x04B4 (Cypress) Product ID USB Product ID (Assigned by designer) 0x6813 Serial Number USB serial number N/A Manufacturer String Manufacturer string in USB descriptors N/A Product String Product string in USB descriptors N/A Enable Write Protection Enables write protection capability Enabled SCSI Device Name String show
Inhaltszusammenfassung zur Seite Nr. 7
CY7C68023/CY7C68024 11.0 DC Characteristics Parameter Description Conditions Min. Typ. Max. Unit V Supply Voltage 3.0 3.3 3.6 V CC V Ramp Supply Ramp-up 0V to 3.3V 200 µs CC V Input High Voltage 2 5.25 V IH V Input Low Voltage –0.5 0.8 V IL I Input Leakage Current 0 < V < V ±10 µA I IN CC V Crystal Input HIGH Voltage 2 5.25 V IH_X V Crystal Input LOW Voltage –0.5 0.8 V IL_X V Output Voltage High I = 4 mA 2.4 V OH OUT V Output Voltage Low I = –4 mA 0.4 V OL OUT I Output Current High 4mA OH I Ou
Inhaltszusammenfassung zur Seite Nr. 8
CY7C68023/CY7C68024 14.0 Package Diagram 56-Lead QFN 8 x 8 MM LF56A TOPVIEW BOTTOMVIEW SIDEVIEW 0.08[0.003] C 1.00[0.039]MAX. 7.90[0.311] A 8.10[0.319] 0.05[0.002]MAX. 0.80[0.031]MAX. 7.70[0.303] 0.18[0.007] 7.80[0.307] 0.20[0.008]REF. 0.28[0.011] PIN1ID N N 0.20[0.008]R. 1 1 2 2 0.80[0.031] 0.45[0.018] DIA. E-PAD (PADSIZEVARY BYDEVICETYPE) 0.30[0.012] 0.50[0.020] 0.24[0.009] (4X) 0°-12° 0.60[0.024] 0.50[0.020] 6.45[0.254] C SEATING 6.55[0.258] PLANE Dimensions in mm 51-85144-*D E-Pad Size 4.3
Inhaltszusammenfassung zur Seite Nr. 9
CY7C68023/CY7C68024 Document History Page Description Title: CY7C68023/CY7C68024 EZ-USB NX2LP™ USB 2.0 NAND Flash Controller Document Number: 38-08055 Issue Orig. of REV. ECN NO. Date Change Description of Change ** 286009 SEE ECN GIR New Data Sheet (Preliminary Information). *A 334796 SEE ECN GIR Adjusted default VID/PID; released as final. *B 397024 SEE ECN GIR Changed Vcc to ±10% in DC Characteristics table. Changed the supply voltage tolerance to ±10% in the Operating Conditions section.
