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User’s Manual
™
from Emerson Network Power
Embedded Computing
®
KAT4000: AMC Carrier for ATCA April 2007
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The information in this manual has been checked and is believed to be accurate and reli- able. HOWEVER, NO RESPONSIBILITY IS ASSUMED BY ARTESYN COMMUNICATION PROD- UCTS FOR ITS USE OR FOR ANY INACCURACIES. Specifications are subject to change without notice. ARTESYN COMMUNICATION PRODUCTS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF USE OR OTHER APPLICATION OF ANY PRODUCT, CIRCUIT, OR PROGRAM DESCRIBED HEREIN. This document does not convey any license under Artesyn Communi- cation Products pa
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Regulatory Agency Warnings & Notices The Emerson KAT4000 meets the requirements set forth by the Federal Communications Commission (FCC) in Title 47 of the Code of Federal Regulations. The following information is provided as required by this agency. This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that
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Regulatory Agency Warnings & Notices (continued) EC Declaration of Conformity According to EN 45014:1998 Manufacturer’s Name: Emerson Network Power Embedded Computing Manufacturer’s Address: 8310 Excelsior Drive Madison, Wisconsin 53717 Declares that the following product, in accordance with the requirements of 89/336/EEC, EMC Directive and 99/5/EC, RTTE Directive and their amending directives, Product: ATCA Carrier Model Name/Number: KAT4000/10007505-xx has been designed and manufactured to t
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Contents Machine State Register. . . . . . . . . . . 3-9 1Overview Peripheral Interface . . . . . . . . . . . . . . . . 3-10 Components and Features . . . . . . . . . . . 1-1 MPC8548 Peripheral Modules . . . . . . . 3-11 KAT4000 Options. . . . . . . . . . . . . . . . 1-3 Three-Speed Ethernet Controllers Functional Overview . . . . . . . . . . . . . . . . 1-5 (TSEC) . . . . . . . . . . . . . . . . . . . . . . . . 3-11 Physical Memory Map . . . . . . . . . . . . . . . 1-6 Local Bus Controller (LB
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Contents (continued) 10 GbE-1 GbE Fat Pipe Switch Module Clock Synchronizer Primary Source PLD . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16 Registers 1-3 (CPS1—CPS3) . . . . . . 7-14 Product ID/Version Register. . 5-16 Clock Synchronizer Secondary Source Scratch Register . . . . . . . . . . . .5-17 Registers 1-3 (CSS1—CSS3) . . . . . . 7-15 I2C Register . . . . . . . . . . . . . . . .5-17 Clock Control Registers (CCR1—CCR14) Reserved Register 1 . . . . . . . . .5-18 7-17 Switch R
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Contents (continued) Bused Resource Status Command 9-22 Firmware Upgrade Termination . . 9-51 Graceful Reset Command. . . . . . . .9-23 Firmware Upgrade Sequence . . . . 9-51 Diagnostic Interrupt Results . . . . .9-24 Get Payload Shutdown Time-Out Command . . . . . . . . . . . . . . . . . . . . . 9-24 10 Synchronization Clocks Set Payload Shutdown Time-Out MT9045 and MT9046 Clock Synchronizers . Command . . . . . . . . . . . . . . . . . . . . . 9-25 10-2 Get Module State Command . . . . . 9-25
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Contents (continued) Typographic Conventions . . . . . . . 14-9 printenv. . . . . . . . . . . . . . . . . . . . . . 14-21 Boot Commands. . . . . . . . . . . . . . . . . . . 14-9 saveenv . . . . . . . . . . . . . . . . . . . . . . 14-21 bootd . . . . . . . . . . . . . . . . . . . . . . . . . 14-9 setenv . . . . . . . . . . . . . . . . . . . . . . . 14-21 bootelf . . . . . . . . . . . . . . . . . . . . . . . .14-9 Test Commands . . . . . . . . . . . . . . . . . . 14-21 bootm . . . . . . . . . . .
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Contents (continued) Ethernet Switch Configuration . . . . . . . A-2 VLAN Commands . . . . . . . . . . A-12 Default Switch Configuration . . . . . A-2 Aggregation/Trunking Commands A-13 Serial Command Line Interface (CLI). . . A-3 User Group Commands . . . . . A-14 Log In/Log Out Procedures. . . . . . . . A-3 QoS Commands. . . . . . . . . . . . A-14 Help Utility. . . . . . . . . . . . . . . . . . . . . . A-3 Mirror Commands . . . . . . . . . . A-16 Command Hierarchy . . . . . . . . . . . . . A-4
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(blank page) viii KAT4000 User’s Manual 10007175-02
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Figures Figure 1-1: General System Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 Figure 1-2: KAT4000 Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 Figure 1-3: AMC Port Mapping Regions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9 Figure 2-1: Component Map, Top (Rev. 02) . . . . . . . . . . . . . . . . . . .
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Figures (continued) Figure 8-2: Diagram of SATA line connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-6 Figure 9-1: IPMC Connections Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2 Figure 9-2: Extension Command Request Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-7 Figure 9-3: Extension Command Response Example . . . . . . . . . . . . . . . . . . .
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Tables Table 1-1: KAT4000 Address Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7 Table 1-2: Regulatory Agency Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10 Table 1-3: Technical References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12 Table 2-1: Circuit Board Dimensions . . . . . . . . . . . . . . . . . . . . . . .
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Tables (continued) Table 9-10: Get Debug Level Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-16 Table 9-11: Set Debug Level Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-17 Table 9-12: Get Hardware Address Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-17 Table 9-13: Set Hardware Address Command . . . . . . . . . . . . . . . . . . .
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Tables (continued) Table 11-1: RTC Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-2 Table 12-1: Zone 1 Connector, P10 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-1 Table 12-2: Zone 2 Connector, J20 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-3 Table 12-3: Zone 2 Connector, J23 Pin Assignments . . . . . . . . . . . . . . .
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Tables (continued) Table B-23: B3 +12V Current SDR Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-38 Table B-24: B3 +12V Volt SDR Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-40 Table B-25: B4 +12V Current SDR Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-41 Table B-26: B4 +12V Volt SDR Description . . . . . . . . . . . . . . . . . . .
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Registers Register 3-1: L2 Control Register (L2CR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4 Register 3-2: MPC8548 Hardware Implementation Dependent Register 0 (HID0) . . . . . . . . . . . . . 3-6 Register 3-3: MPC8548 Hardware Implementation Dependent Register 1 (HID1) . . . . . . . . . . . . . 3-8 Register 3-4: CPU Machine State Register (MSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9 Reg
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Registers (continued) Register 7-19: Clock Control Registers 1-14 (CCR1-CCR14) at 0xfc40,0070, 0xfc40,0074, 0xfc40,0078, 0xfc40,007c, 0xfc40,0080, 0xfc40,0084, 0xfc40,0088, 0xfc40,008c, 0xfc40,0090, 0xfc40,0094, 0xfc40,0098, 0xfc40,009c, 0xfc40,00a0, 0xfc40,00a4, respectively . . . . . . . . . . . . . . 7-17 Register 7-20: Clock Synchronizer Interrupt Registers 1-3 (CSI1-CSI3) at 0xfc40,00a8, 0xfc40,00ac, 0xfc40,00b0, respectively . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Section 1 Overview ® The KAT4000 is a single-slot Advanced Telecom Computing Architecture (AdvancedTCA , ATCA™) carrier with up to four Advanced Mezzanine Cards (AMC) expansion modules. This expansion capability enables a wide variety of control and packet processing applications such as WAN access, traffic processing, signaling gateways, media gateways, and many ® others. ATCA is an open architecture telecom platform as defined by the PICMG 3.0 Revi- sion 2.0 AdvancedTCA™ Base Specification
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Overview: Components and Features The NOR Flash consists of two 16 megabyte banks. The supported NAND flash is 512 mega- bytes or 1 gigabyte. Flash is only implemented on the processor KAT4000 board configura- tion. Chapter 6 provides more information. CPLD: The KAT4000 uses a Complex Programmable Logic Device (CPLD) to control board reset logic, the Board Configuration, Board Revision and User LED registers, and miscellaneous board logic. Register access to the PLD is only available on the pr
