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2i
blu Module
User Guide
The information contained in this document is subject to change without notice. TDK Systems Europe makes no warranty of
any kind with regard to this material including, but not limited to, the implied warranties of merchant ability and fitness for a
particular purpose. TDK Systems Europe shall not be liable for errors contained herein or for incidental or consequential
damages in connection with the furnishing, performance, or use of this
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Contents BEFORE YOU BEGIN.................................................................................................................................................................... 3 SAFETY GUIDELINES................................................................................................................................................................... 3 RF APPROVALS............................................................................................................
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Before You Begin 2i Congratulations on your purchase of the TDK Systems blu Module. The Module is designed to be built into a device and to provide a simple, low cost Bluetooth interface. The module is designed to integrate with a wide range of applications and platforms with a simple electrical and software interface using AT commands. This guide aims to provide all the electrical and mechanical information 2i needed to design applications using the blu Module. A separate 2i docum
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1 Functions 2i The blu Module contains a complete Bluetooth interface and requires no further hardware to implement full Bluetooth communication. The module has an integrated, high performance antenna together with all RF and Baseband circuitry, it interfaces to the host over a straight forward serial port using AT commands. The module runs specific firmware within the Virtual Processor that includes a serial Port Profile and AT command interpreter. The module can be configured so that
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2 Application Interface 2i The blu Module is equipped with a 40-pin 0.5mm pitch board to board connector that connects to the application platform. Electrical and mechanical characteristics of the board-to-board connector are specified in Chapter 3. • Serial interface (see Section 3.0) • Electrical specification of the interface (see Section 3.1) 2.1 Serial Interface UART_TX, UART_RX, UART_RTS and UART_CTS form a conventional asynchronous serial data port. The interface is design
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RS232 Interface UART Interface 2i blu Module Application UART_TX /RXD UART_RX /TXD UART_CTS /RTS UART_RTS /CTS UART_DTS /DTR UART_DTR /DSR UART_DCD /DCD UART RI /RING Figure: UART interfaces 2.2 Power Supply 2i The power supply for the blu Module has to be a single voltage source of Vcc= 3.6V to 6V. It must be able to provide sufficient current in a transmit burst which can rise to 65mA. The module includes regulators to provide local 3.3V and 1.8V. These rails are acces
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example when the supply voltage to the module experiences a Brown- Out (momentary dip in the supply voltage level), or a rapid power cycle i.e. the power is switched off and then on within 1second, there is a possibility that the module can enter an unknown state of operation. It is strongly recommended that the application hardware onto which the module is mounted provides a Power-On-Reset circuit with a Brown-Out detection capability. This will guarantee that under all circumstances the
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2.4 SPI Bus The module is a slave device that uses terminals SPI_MOSI, SPI_MISO, SPI_CLK and SPI_CSB. This interface is used for program firmware update. Note: The designer should be aware that no security protection is built into the hardware or firmware associated with this port, so the terminals should not be permanently connected in a PC application. 2.5 Parallel PIO Port Five lines of programmable bi-directional input/outputs (I/O) are provided. GPIO[1:5] are powered from VCC
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3 Electrical specification of the interface The Hirose DF12C board to board connector on the module is a 40 way double-row receptacle. The pin allocation is as follows: Pin Signal Description Pin Signal Description 1 Analogue 0 1.8v Max 2 GPIO1 I/O for Host 3 Analogue 1 1.8v Max 4 GPIO2 I/O for Host 5 SPI_MISO SPI bus serial 6 UART_RI ‘Ring’ Input or O/P Output 7 SPI_CSB SPI bus chip 8 UART_DCD Input or Output select I/P 9 SPI_CLK SPI bus clock 10 UART_DSR Input I/P 11 GN
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Notes: • UART_RX, UART_TX, UART_CTS, UART_RTS, UART_RI, UART_DCD and UART_DSR are all 3.3v level logic. For example, when RX and TX are idle they will be sitting at 3.3V. Conversely for handshaking pins CTS, RTS, RI, DCD, DSR a 0v is treated as an assertion. • Pin 6 (UART_RI) is active low. It is normally 3.3v. When a remote device initiates a connection, this pin goes low. This means that when this pin is converted to RS232 voltage levels it will have the correct voltage level for
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3.1 Electric Characteristics Function Signal Name Pin No I/O Signal level Comments Power Vcc 29 I 3.6V to 6V Ityp = 50mA Supply GND 11, 15, 6 Ground 18, 30, terminals to 36, 38 be attached in parallel RS232 UART_TX 21 O V max=0.2V OL Interface V min=2.8V OH UART_RX 25 I V max=0.8V IL V min=2.10V IH V max=3.7V IH UART_CTS 19 I V max=0.8V IL V min=2.10V IH V max=3.7V IH UART_RTS 23 O V max=0.2V OL V min=2.8V OH UART_DSR 10 I V max=0.8V IL V min=2.10V IH V max=3.7
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V min=2.10V IH V max=3.7V IH PCM PCM_CLK 20 I or O O/P : V max=0.2V If unused OL Interface V min=2.8V keep pins OH I/P : V max=0.8V open IL V min=2.10V IH V max=3.7V IH PCM_IN 22 I V max=0.8V IL V min=2.10V IH V max=3.7V IH PCM_SYNC 24 I or O O/P : V max=0.2V OL V min=2.8V OH I/P : V max=0.8V IL V min=2.10V IH V max=3.7V IH PCM_OUT 26 O V max=0.2V OL V min=2.8V OH Reserved BC02 32 I V max =0.3vdd_pads Normally
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4 Physical Characteristics 4.1 Mechanical Dimensions 13 of 36
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2i 4.2 Mounting the blu Module onto the application platform There are many ways to properly install the Module in a host device. An efficient approach is to mount the PCB to a frame, plate, rack or chassis. Fasteners can be M1.8 or M2 screws plus suitable washers, circuit board spacers, or customized screws, clamps, or brackets in 2.2mm diameter holes. Note that care should be taken to ensure the head of the fixing does not interfere with the circuit. Nylon fixings are recommended. In
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Mating headers from Hirose are available in different stacking heights. Details are available at: http://www.hirose.co.jp/cat2002e/500/e53700036.pdf Item Part number Stacking height HRS number Headers DF12(3.5)-40DP- 3.5mm CL537-0032-4- DF12 series 0.5V(81) ** DF12(4.0)-40DP- 4.0mm CL537-0057-5- 0.5V(81) ** DF12(5.0)-40DP- 5.0mm CL537-0157-0- 0.5V(81) ** Note: The headers listed above are without boss and metal fitting. Electrical and mechanical characteristics of the Hirose
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5 Electrical and radio characteristics 5.1 Absolute Maximum ratings Absolute maximum ratings for supply voltage and voltages on digital and analog pins of the module are listed below. Exceeding these values will cause permanent damage. Minimum Maximum Peak current of power supply 0mA 100mA Voltage at digital pins -0.3V 3.7V Voltage at POWER pin 3.3V 7V 5.2 Operating temperatures Minimum Typical Maximum Operating temperature -20°C 25°C +75°C 5.3 Power Consumption The cu
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being transferred and when data is being transferred at the maximum rate possible. The operating mode can best be described by stating the AT commands required to enter that mode. In addition, there are certain S Registers which have a direct impact on power consumption, which are described next. 2i The blu Module has 2 LEDs which can be configured to display connection status. One led is used to display connection status, while the other is used to either display ‘Ring Indicate’ statu
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Baud rate 9600 38400 115200 460800 Current per LED 3.6V 3.20 3.20 3.20 3.20 5.0V 5.30 5.30 5.30 5.30 Baud rate 9600 38400 115200 460800 Idle Mode, S512=1 3.6V 1.60 1.80 1.96 3.00 5.0V 2.00 2.10 2.30 3.40 Wait for Connection Or 3.6V 59.00 59.00 59.00 59.00 Discoverable Mode, 5.0V 65.00 65.00 65.00 65.00 AT+BTP S508=S510=640, S509=S511=320 Wait for Connection Or 3.6V 2.75 2.94 3.10 4.12 Discoverable Mode, 5.0V 3.26 3.36 3.55 4.63 AT+BTP S508=S510=1000, S509=S511=11 Inqu
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It is possible to reduce the duty cycle down to as low as 0.5% at the expense of response time. The response time can be specified via S Registers 508 and 510 for page and inquiry respectively, where the worst case response time can be as high as 2.5 seconds. Then the duty cycle can be varied by changing the value of S Registers 509 and 511 appropriately. For example, if S Register 508 and 510 are both set to 1000ms and S Register 509 and 511 are both set to 11ms then the duty cycle is
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contacted during N-M slots, and so can switch its power hungry circuitry off. The specification goes further by also specifying a third parameter called ‘timeout’ (T) which specifies ‘extra’ timeslots that the slave will agree to listen for after receiving a valid data packet. Put another way, if a data packet is received by the slave, then it knows that it MUST carry on listening for at least T more slots. If within that T slot time period another data packet is received, then the timer i
